ATTINY861-15MZ Atmel, ATTINY861-15MZ Datasheet - Page 110
![MCU AVR 8K FLASH 15MHZ 32-QFN](/photos/30/99/309943/qfn-32_sml.jpg)
ATTINY861-15MZ
Manufacturer Part Number
ATTINY861-15MZ
Description
MCU AVR 8K FLASH 15MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY861-15MZ.pdf
(236 pages)
Specifications of ATTINY861-15MZ
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
16
Eeprom Size
512 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
512 x 8
Program Memory Size
8KB (8K x 8)
Data Converters
A/D 11x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY861-15MZ
Manufacturer:
ATMEL
Quantity:
1 465
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16.10 Accessing 10-Bit Registers
110
ATtiny261/461/861
If 10-bit values are written to the TCNT1 and OCR1A/B/C/D registers, the 10-bit registers can be
byte accessed by the AVR CPU via the 8-bit data bus using two read or write operations. The
10-bit registers have a common 2-bit Timer/Counter1 High Byte Register (TC1H) that is used for
temporary storing of the two MSBs of the 10-bit access. The same TC1H register is shared
between all 10-bit registers. Accessing the low byte triggers the 10-bit read or write operation.
When the low byte of a 10-bit register is written by the CPU, the high byte stored in the TC1H
register, and the low byte written are both copied into the 10-bit register in the same clock cycle.
When the low byte of a 10-bit register is read by the CPU, the high byte of the 10-bit register is
copied into the TC1H register in the same clock cycle as the low byte is read.
To do a 10-bit write, the high byte must be written to the TC1H register before the low byte is
written. For a 10-bit read, the low byte must be read before the high byte.
The following code examples show how to access the 10-bit timer registers assuming that no
interrupts updates the TC1H register. The same principle can be used directly for accessing the
OCR1A/B/C/D registers.
Note:
The assembly code example returns the TCNT1 value in the r17:r16 register pair.
Assembly Code Example
C Code Example
unsigned int i;
...
/* Set TCNT1 to 0x01FF */
TC1H = 0x01;
TCNT1 = 0xFF;
/* Read TCNT1 into i */
i = TCNT1;
i |= ((unsigned int)TC1H << 8);
...
...
; Set TCNT1 to 0x01FF
ldi r17,0x01
ldi r16,0xFF
out TC1H,r17
out TCNT1,r16
; Read TCNT1 into r17:r16
in r16,TCNT1
in r17,TC1H
...
1. The example code assumes that the part specific header file is included.
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
2588B–AVR–11/06
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