ATTINY861-15MZ Atmel, ATTINY861-15MZ Datasheet - Page 94

• Manufacturer Part Number: ATTINY861-15MZ
• Description: MCU AVR 8K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY861-15MZ

• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 16
• Eeprom Size: 512 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Program Memory Size: 8KB (8K x 8)
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.2.5
94
ATtiny261/461/861
Definitions
Figure 16-2. Timer/Counter1 Synchronization Register Block Diagram.
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A, B, C or D. However, when using the register or bit
defines in a program, the precise form must be used, i.e., TCNT1 for accessing Timer/Counter1
counter value and so on. The definitions in
document.
Table 16-1.
BOTTOM
MAX
TOP
PCKE
CK
PCK
SYNC
MODE
ASYNC
MODE
IO-registers
The counter reaches the BOTTOM when it becomes 0.
The counter reaches its MAXimum value when it becomes 0x3FF (decimal 1023).
The counter reaches the TOP value (stored in the OCR1C) when it becomes equal to the
highest value in the count sequence. The TOP has a value 0x0FF as default after reset.
OCR1B
OCR1C
OCR1D
TC1H
OCF1A
OCF1B
OCF1D
OCR1A
TCCR1A
TCCR1B
TCCR1C
TCCR1D
TCNT1
TOV1
Definitions
~1/2 CK Delay
1/2 CK Delay
S
A
Input synchronization
registers
OCR1A_SI
OCR1B_SI
OCR1C_SI
OCR1D_SI
TCCR1A_SI
TCCR1B_SI
TCCR1C_SI
TCCR1D_SI
TCNT1_SI
TC1H_SI
OCF1A_SI
OCF1B_SI
OCF1D_SI
TOV1_SI
1 PCK Delay
1 CK Delay
Table 16-1
S
A
8-BIT DATABUS
Timer/Counter1
TCNT1
are used extensively throughout the
1 CK Delay
1 PCK Delay
Output synchronization
registers
TCNT1_SO
TC1H_SO
OCF1A_SO
OCF1B_SO
OCF1D_SO
TOV1_SO
1/2 CK Delay
~1 CK Delay
2588B–AVR–11/06
TCNT1
TC1H
OCF1A
OCF1B
OCF1D
TOV1