ATTINY861-15MZ Atmel, ATTINY861-15MZ Datasheet - Page 116
ATTINY861-15MZ
Manufacturer Part Number
ATTINY861-15MZ
Description
MCU AVR 8K FLASH 15MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY861-15MZ.pdf
(236 pages)
Specifications of ATTINY861-15MZ
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
16
Eeprom Size
512 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
512 x 8
Program Memory Size
8KB (8K x 8)
Data Converters
A/D 11x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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16.11.2
116
ATtiny261/461/861
TCCR1B – Timer/Counter1 Control Register B
value. The automatic action programmed in COM1A1 and COM1A0 takes place as if a compare
match had occurred, but no interrupt is generated. The FOC1A bit is always read as zero.
• Bit 2 - FOC1B: Force Output Compare Match 1B
The FOC1B bit is only active when the PWM1B bit specify a non-PWM mode.
Writing a logical one to this bit forces a change in the Waveform Output (OCW1B) and the Out-
put Compare pin (OC1B) according to the values already set in COM1B1 and COM1B0. If
COM1B1 and COM1B0 written in the same cycle as FOC1B, the new settings will be used. The
Force Output Compare bit can be used to change the output pin value regardless of the timer
value. The automatic action programmed in COM1B1 and COM1B0 takes place as if a compare
match had occurred, but no interrupt is generated.
The FOC1B bit is always read as zero.
• Bit 1 - PWM1A: Pulse Width Modulator A Enable
When set (one) this bit enables PWM mode based on comparator OCR1A
• Bit 0 - PWM1B: Pulse Width Modulator B Enable
When set (one) this bit enables PWM mode based on comparator OCR1B.
• Bit 7 - PWM1X : PWM Inversion Mode
When this bit is set (one), the PWM Inversion Mode is selected and the Dead Time Generator
outputs, OC1x and OC1x are inverted.
• Bit 6 - PSR1 : Prescaler Reset Timer/Counter1
When this bit is set (one), the Timer/Counter1 prescaler (TCNT1 is unaffected) will be reset. The
bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have
no effect. This bit will always read as zero.
• Bits 5,4 - DTPS11, DTPS10: Dead Time Prescaler Bits
The Timer/Counter1 Control Register B is a 8-bit read/write register.
The dedicated Dead Time prescaler in front of the Dead Time Generator can divide the
Timer/Counter1 clock (PCK or CK) by 1, 2, 4 or 8 providing a large range of dead times that can
be generated. The Dead Time prescaler is controlled by two bits DTPS11 and DTPS10 from the
Dead Time Prescaler register. These bits define the division factor of the Dead Time prescaler.
The division factors are given in
Bit
0x2F (0x4F)
Read/Write
Initial value
PWM1X
R/W
7
0
PSR1
R/W
6
0
Table
DTPS11
R/W
5
0
16-14.
DTPS10
R/W
4
0
CS13
R/W
3
0
CS12
R/W
2
0
CS11
R/W
1
0
CS10
R/W
0
0
2588B–AVR–11/06
TCCR1B
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