ATTINY861-15MZ Atmel, ATTINY861-15MZ Datasheet - Page 64

• Manufacturer Part Number: ATTINY861-15MZ
• Description: MCU AVR 8K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY861-15MZ

• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 16
• Eeprom Size: 512 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Program Memory Size: 8KB (8K x 8)
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

64
ATtiny261/461/861
Table 12-4
shown in
Table 12-4.
Note:
Table 12-5.
Note:
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE PCINT11 • PCIE
DIEOV 0
DI
AIO
1. 1 when the Fuse is “0” (Programmed).
1. INTRC means that one of the internal RC Oscillators are selected (by the CKSEL fuses),
PB3/OC1B/
PCINT11
0
0
0
0
OC1B Enable
OC1B
0
PCINT11
PB7/RESET/dW/
ADC10/PCINT15
RSTDISBL
DWEN
1
RSTDISBL
DWEN
debugWire Transmit 0
0
0
0
0
ADC10D
PCINT15
RESET / ADC10
Figure 12-5 on page
EXTCK means that external clock is selected (by the CKSEL fuses).
and
Overriding Signals for Alternate Functions in PB7..PB4
Overriding Signals for Alternate Functions in PB3..PB0
(1)
(1)
Table 12-5
(1)
(1)
•
•
PB2/SCK/USCK/SCL/
OC1B/PCINT10
0
0
USI_TWO_WIRE • USIPOS
(USI_SCL_HOLD +
PORTB2) • DDB2 • USIPOS
OC1B Enable + USIPOS •
USI_TWO_WIRE • DDRB2
OC1B
USI_PTOE • USIPOS
PCINT10 • PCIE + USISIE •
USIPOS
0
USCK/SCL/PCINT10
PB6/ADC9/T0/INT0/
PCINT14
0
0
0
0
0
0
RSTDISBL + (PCINT5
• PCIE + ADC9D)
ADC9D
T0/INT0/PCINT14
ADC9
relate the alternate functions of Port B to the overriding signals
59.
PB5/XTAL2/CLKO/
OC1D/ADC8/PCINT13
INTRC • EXTCLK
0
INTRC • EXTCLK
0
OC1D Enable
OC1D
0
INTRC • EXTCLK + PCINT4 •
PCIE + ADC8D
(INTRC • EXTCLK) + ADC8D INTRC • ADC7D
PCINT13
XTAL2, ADC8
PB1/MISO/DO/OC1A/
PCINT9
0
0
0
0
OC1A Enable + USIPOS
• USI_THREE_WIRE
OC1A + (DO • USIPOS)
0
PCINT9 • PCIE
0
PCINT9
(1)
PB0/MOSI/DI/SDA/
OC1A/PCINT8
0
0
USI_TWO_WIRE •
USIPOS
(SDA + PORTB0) •
DDRB0 • USIPOS
OC1A Enable +
(USI_TWO_WIRE •
DDRB0 • USIPOS)
OC1A
0
PCINT8 • PCIE +
(USISIE • USIPOS)
0
DI/SDA/PCINT8
OC1D Enable
PCINT12
XTAL1, ADC7
PB4/XTAL1/OC1D/
ADC7/PCINT12
INTRC
0
INTRC
0
OC1D
0
INTRC + PCINT12
• PCIE + ADC7D
2588B–AVR–11/06
(1)