PIC18F65K22-I/MRRSL Microchip Technology, PIC18F65K22-I/MRRSL Datasheet - Page 177
![MCU PIC 32K FLASH MEM XLP 64QFN](/photos/19/6/190652/4732178_sml.jpg)
PIC18F65K22-I/MRRSL
Manufacturer Part Number
PIC18F65K22-I/MRRSL
Description
MCU PIC 32K FLASH MEM XLP 64QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC18F65K22T-IPTRSL.pdf
(548 pages)
3.PIC18F65K22T-IPTRSL.pdf
(10 pages)
Specifications of PIC18F65K22-I/MRRSL
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC18
No. Of I/o's
53
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
64MHz
No. Of Timers
8
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC18F65K22T-IPTRSL PDF datasheet #2
- PIC18F65K22T-IPTRSL PDF datasheet #3
- Current page: 177 of 548
- Download datasheet (5Mb)
TABLE 12-9:
2010 Microchip Technology Inc.
RE2/P2B/
CCP10/CS/
AD10
RE3/P3C/
CCP9/REFO/
AD11
RE4/P3B/
CCP8/AD12
RE5/P1C/
CCP7/AD13
RE6/P1B/
CCP6/AD14
Legend:
Note 1:
Pin Name
2:
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared and in Microcontroller mode.
This feature is only available on PIC18F8XKXX devices.
Function
PORTE FUNCTIONS (CONTINUED)
CCP10
REFO
CCP9
CCP8
CCP7
CCP6
AD10
AD11
AD12
AD13
AD14
RE2
RE3
P3C
RE4
RE5
P1C
RE6
P2B
P3B
P1B
CS
Setting
TRIS
0
1
0
1
x
x
x
0
1
0
0
1
x
x
x
0
1
0
0
1
x
x
0
1
0
0
1
x
x
0
1
0
0
1
x
x
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
DIG
TTL
DIG
TTL
DIG
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
Preliminary
LATE<2> data output.
PORTE<2> data input.
ECCP2 PWM Output B.
May be configured for tri-state during Enhanced PWM shutdown events.
Capture 10 input/Compare 10 output/PWM10 output.
Parallel Slave Port chip select.
External memory interface, Address/Data Bit 10 output.
External memory interface, Data Bit 10 input.
LATE<3> data output.
PORTE<3> data input.
ECCP3 PWM Output C.
May be configured for tri-state during Enhanced PWM shutdown events.
CCP9 Compare/PWM output. Takes priority over port data.
CCP9 capture input.
Reference output clock.
External memory interface, Address/Data Bit 11 output.
External memory interface, Data Bit 11 input.
LATE<4> data output.
PORTE<4> data input.
ECCP3 PWM Output B.
May be configured for tri-state during Enhanced PWM shutdown events.
CCP8 compare/PWM output. Takes priority over port data.
CCP8 capture input.
External memory interface, Address/Data Bit 12 output.
External memory interface, Data Bit 12 input.
LATE<5> data output.
PORTE<5> data input.
ECCP1 PWM Output C.
May be configured for tri-state during Enhanced PWM shutdown events.
CCP7 compare/PWM output. Takes priority over port data.
CCP7 capture input.
External memory interface, Address/Data Bit 13 output.
External memory interface, Data bit 13 input.
LATE<6> data output.
PORTE<6> data input.
ECCP1 PWM Output B.
May be configured for tri-state during Enhanced PWM shutdown events.
CCP6 compare/PWM output. Takes priority over port data.
CCP9 capture input.
External memory interface, Address/Data Bit 14 output.
External memory interface, Data Bit 14 input.
PIC18F87K22 FAMILY
Description
DS39960B-page 177
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