PIC18F65K22-I/MRRSL Microchip Technology, PIC18F65K22-I/MRRSL Datasheet - Page 329

MCU PIC 32K FLASH MEM XLP 64QFN

PIC18F65K22-I/MRRSL

Manufacturer Part Number
PIC18F65K22-I/MRRSL
Description
MCU PIC 32K FLASH MEM XLP 64QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F65K22-I/MRRSL

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC18
No. Of I/o's
53
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
64MHz
No. Of Timers
8
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
22.1
The BRG is a dedicated, 8-bit or 16-bit generator that
supports both the Asynchronous and Synchronous
modes of the EUSART. By default, the BRG operates
in 8-bit mode; setting the BRG16 bit (BAUDCONx<3>)
selects 16-bit mode.
The SPBRGHx:SPBRGx register pair controls the period
of a free-running timer. In Asynchronous mode, bits,
BRGH (TXSTAx<2>) and BRG16 (BAUDCONx<3>),
also control the baud rate. In Synchronous mode, BRGH
is ignored. Table 22-1 shows the formula for computation
of the baud rate for different EUSART modes which only
apply in Master mode (internally generated clock).
Given the desired baud rate and F
integer value for the SPBRGHx:SPBRGx registers can
be calculated using the formulas in Table 22-1. From this,
the error in baud rate can be determined. An example
calculation is shown in Example 22-1. Typical baud rates
and error values for the various Asynchronous modes
are shown in Table 22-2. It may be advantageous to use
the high baud rate (BRGH = 1) or the 16-bit BRG to
reduce the baud rate error, or achieve a slow baud rate
for a fast oscillator frequency.
TABLE 22-1:
 2010 Microchip Technology Inc.
Legend: x = Don’t care, n = value of SPBRGHx:SPBRGx register pair
SYNC
0
0
0
0
1
1
Baud Rate Generator (BRG)
Configuration Bits
BAUD RATE FORMULAS
BRG16
0
0
1
1
0
1
BRGH
0
1
0
1
x
x
OSC
, the nearest
Preliminary
BRG/EUSART Mode
16-bit/Asynchronous
16-bit/Asynchronous
16-bit/Synchronous
8-bit/Asynchronous
8-bit/Asynchronous
8-bit/Synchronous
PIC18F87K22 FAMILY
Writing a new value to the SPBRGHx:SPBRGx
registers causes the BRG timer to be reset (or cleared).
This ensures the BRG does not wait for a timer over-
flow before outputting the new baud rate. When
operated in the Synchronous mode, SPBRGH:SPBRG
values of 0000h and 0001h are not supported. In the
Asynchronous mode, all BRG values may be used.
22.1.1
The device clock is used to generate the desired baud
rate. When one of the power-managed modes is
entered, the new clock source may be operating at a
different frequency. This may require an adjustment to
the value in the SPBRGx register pair.
22.1.2
The data on the RXx pin (either RC7/RX1/DT1 or
RG2/RX2/DT2/AN18/C3INA) is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RXx pin.
OPERATION IN POWER-MANAGED
MODES
SAMPLING
Baud Rate Formula
F
F
F
OSC
OSC
OSC
/[64 (n + 1)]
/[16 (n + 1)]
/[4 (n + 1)]
DS39960B-page 329

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