PIC18F65K22-I/MRRSL Microchip Technology, PIC18F65K22-I/MRRSL Datasheet - Page 382

• Manufacturer Part Number: PIC18F65K22-I/MRRSL
• Description: MCU PIC 32K FLASH MEM XLP 64QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K22-I/MRRSL

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC18
• No. Of I/o's: 53
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
26.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 26-1:
DS39960B-page 382
HLVDCON
INTCON
PIR2
PIE2
IPR2
TRISA
ANCON0
Legend: — = unimplemented, read as ‘ 0 ’. Shaded cells are unused by the HLVD module.
Note 1:
Name
Operation During Sleep
PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘ 0 ’.
VDIRMAG
GIE/GIEH
TRISA7
ANSEL7
OSCFIE
OSCFIP
OSCFIF
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Bit 7
(1)
PEIE/GIEL
TRISA6
ANSEL6
BGVST
Bit 6
—
—
—
(1)
ANSEL5
TMR0IE
SSP2IF
SSP2IE
SSP2IP
TRISA5
IRVST
Bit 5
Preliminary
HLVDEN
ANSEL4
BLC2IF
BLC2IE
BLC2IP
TRISA4
INT0IE
Bit 4
26.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
ANSEL3
HLVDL3
TRISA3
BCL1IF
BCL1IE
BCL1IP
RBIE
Bit 3
Effects of a Reset
ANSEL2
HLVDL2
TMR0IF
HLVDIF
HLVDIE
HLVDIP
TRISA2
Bit 2
 2010 Microchip Technology Inc.
ANSEL1
HLVDL1
TMR3IE
TMR3IP
TMR3IF
TRISA1
INT0IF
Bit 1
TMR3GIE
TMR3GIP
TMR3GIF
ANSEL0
HLVDL0
TRISA0
RBIF
Bit 0