PIC18F65K22-I/MRRSL Microchip Technology, PIC18F65K22-I/MRRSL Datasheet - Page 205

• Manufacturer Part Number: PIC18F65K22-I/MRRSL
• Description: MCU PIC 32K FLASH MEM XLP 64QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K22-I/MRRSL

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC18
• No. Of I/o's: 53
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 14-7:
TABLE 14-5:
 2010 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
TMR1L
TMR1H
T1CON
T1GCON
OSCCON2
PMD1
Legend: Shaded cells are not used by the Timer1 module.
Note 1:
TMR1GE
T1GSPM
T1DONE
T1GPOL
T1GVAL
Name
T1GGO/
RTCCIF
T1G_IN
T1GTM
Timer1
T1CKI
Unimplemented on 32-kB devices (PIC18FX5K22).
Timer1 Register Low Byte
Timer1 Register High Byte
TMR1CS1
GIE/GIEH
TMR1GE
PSPMD
PSPIE
PSPIP
PSPIF
REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER
Bit 7
—
Cleared by Software
TIMER1 GATE SINGLE PULSE AND TOGGLE COMBINED MODE
N
PEIE/GIEL
TMR1CS0 T1CKPS1
SOSCRUN
CTMUMD
T1GPOL
Counting Enabled on
Rising Edge of T1G
Set by Software
ADIF
ADIE
ADIP
Bit 6
RTCCMD
TMR0IE
T1GTM
RC1IE
RC1IP
RC1IF
Bit 5
—
Preliminary
N + 1
T1CKPS0
TMR4MD
Falling Edge of T1GVAL
T1GSPM
INT0IE
TX1IF
TX1IE
TX1IP
Bit 4
—
Set by Hardware on
PIC18F87K22 FAMILY
N + 2
SOSCGO
TMR3MD
SOSCEN
T1DONE
T1GGO/
SSP1IF
SSP1IE
SSP1IP
N + 3
RBIE
Bit 3
TMR1GIF
TMR1GIE
TMR1GIP
TMR2MD
T1SYNC
T1GVAL
TMR0IF
Bit 2
—
N + 4
Cleared by Hardware on
Falling Edge of T1GVAL
TMR1MD
T1GSS1
MFIOFS
TMR2IF
TMR2IE
TMR2IP
INT0IF
RD16
Bit 1
DS39960B-page 205
Cleared by
Software
MFIOSEL
TMR1ON
T1GSS0
TMR1IE
TMR1IP
EMBDM
TMR1IF
RBIF
Bit 0