PIC18F65K22-I/MRRSL Microchip Technology, PIC18F65K22-I/MRRSL Datasheet - Page 40

MCU PIC 32K FLASH MEM XLP 64QFN

PIC18F65K22-I/MRRSL

Manufacturer Part Number
PIC18F65K22-I/MRRSL
Description
MCU PIC 32K FLASH MEM XLP 64QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F65K22-I/MRRSL

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC18
No. Of I/o's
53
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
64MHz
No. Of Timers
8
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F87K22 FAMILY
2.6
Many microcontrollers have options for at least two
oscillators: a high-frequency primary oscillator and a
low-frequency
Section 3.0 “Oscillator Configurations” for details).
The oscillator circuit should be placed on the same
side of the board as the device. Place the oscillator
circuit close to the respective oscillator pins with no
more than 0.5 inch (12 mm) between the circuit
components and the pins. The load capacitors should
be placed next to the oscillator itself, on the same side
of the board.
Use a grounded copper pour around the oscillator cir-
cuit to isolate it from surrounding circuits. The
grounded copper pour should be routed directly to the
MCU ground. Do not run any signal traces or power
traces inside the ground pour. Also, if using a two-sided
board, avoid any traces on the other side of the board
where the crystal is placed.
Layout suggestions are shown in Figure 2-4. In-line
packages may be handled with a single-sided layout
that completely encompasses the oscillator pins. With
fine-pitch packages, it is not always possible to com-
pletely surround the pins and components. A suitable
solution is to tie the broken guard sections to a mirrored
ground layer. In all cases, the guard trace(s) must be
returned to ground.
In planning the application’s routing and I/O assign-
ments, ensure that adjacent port pins and other signals
in close proximity to the oscillator are benign (i.e., free
of high frequencies, short rise and fall times, and other
similar noise).
For additional information and design guidance on
oscillator circuits, please refer to these Microchip
Application Notes, available at the corporate web site
(www.microchip.com):
• AN826, “Crystal Oscillator Basics and Crystal
• AN849, “Basic PICmicro
• AN943, “Practical PICmicro
• AN949, “Making Your Oscillator Work”
2.7
Unused I/O pins should be configured as outputs and
driven to a logic low state. Alternatively, connect a 1 kΩ
to 10 kΩ resistor to V
output to logic low.
DS39960B-page 40
Selection for rfPIC™ and PICmicro
and Design”
External Oscillator Pins
Unused I/Os
secondary
SS
on unused pins and drive the
®
Oscillator Design”
®
oscillator
Oscillator Analysis
®
Devices”
(refer
Preliminary
to
FIGURE 2-4:
(tied to ground)
Timer1 Oscillator
Bottom Layer
Copper Pour
Oscillator
GND
Primary
Crystal
OSCO
OSCI
C1
C2
T1 Oscillator: C1
DEVICE PINS
Single-Sided and In-Line Layouts:
(tied to ground)
Fine-Pitch (Dual-Sided) Layouts:
Copper Pour
SUGGESTED PLACEMENT
OF THE OSCILLATOR
CIRCUIT
Top Layer Copper Pour
`
`
(tied to ground)
 2010 Microchip Technology Inc.
`
Primary Oscillator
T1 Oscillator: C2
Crystal
DEVICE PINS
C2
C1
Oscillator
Crystal
OSC1
OSC2
GND
T1OSO
T1OS I

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