P89LPC982FDH,529 NXP Semiconductors, P89LPC982FDH,529 Datasheet - Page 21

• Manufacturer Part Number: P89LPC982FDH,529
• Description: MCU 80C51 8KB FLASH 28TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC982FDH,529

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 26
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 5
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935290303529

Table 4.
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
Name
TL4
TINTF
TRIM
WDCON
WDL
WFEED1
WFEED2
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
All ports are in input only (high-impedance) state after power-up.
The RSTSRC register reflects the cause of the P89LPC980/982/983/985 reset except BOIF bit. Upon a power-up reset, all reset source flags are cleared except POF and BOF;
the power-on reset value is x011 0000.
The only reset sources that affect these SFRs are power-on reset and watchdog reset.
On power-on reset and watchdog reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
Special function registers - P89LPC980/982
Description
Timer/Counter 4
Low Byte
Timer/Counters
2/3/4 Overflow
and External
Flags
Internal oscillator
trim register
Watchdog control
register
Watchdog load
Watchdog feed 1
Watchdog feed 2
addr.
CBH
CEH
SFR
A7H
C1H
C2H
C3H
96H
Bit functions and addresses
RCCLK
PRE2
MSB
-
ENCLK
PRE1
…continued
-
TRIM.5
PRE0
TF4
TRIM.4
EXF4
-
TRIM.3
TF3
-
WDRUN
TRIM.2
EXF3
WDTOF
TRIM.1
TF2
WDCLK
TRIM.0
EXF2
LSB
00
Reset value
Hex
00
[4][5]
[4][6]
FF
Binary
0000 0000
0000 0000
1111 1111