P89LPC982FDH,529 NXP Semiconductors, P89LPC982FDH,529 Datasheet - Page 60

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P89LPC982FDH,529

Manufacturer Part Number
P89LPC982FDH,529
Description
MCU 80C51 8KB FLASH 28TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC982FDH,529

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
28-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
23
Number Of Timers
5
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935290303529
NXP Semiconductors
P89LPC980_982_983_985
Product data sheet
Fig 20. ADC block diagram
(1) Only on the P89LPC985.
8.4.1 Fixed channel, single conversion mode
8.4.2 Fixed channel, continuous conversion mode
8.4.3 Auto scan, single conversion mode
8.3 Block diagram
8.4 ADC operating modes
AD04
AD05
AD06
AD07
AD00
AD01
AD02
AD03
(1)
(1)
(1)
(1)
A single input channel can be selected for conversion. A single conversion will be
performed and the result placed in the result register pair which corresponds to the
selected input channel. An interrupt, if enabled, will be generated after the conversion
completes.
A single input channel can be selected for continuous conversion. The results of the
conversions will be sequentially placed in the eight result register. The user may select
whether an interrupt can be generated after every four or every eight conversions.
Additional conversion results will again cycle through the result register pairs, overwriting
the previous results. Continuous conversions continue until terminated by the user.
Any combination of the eight input channels can be selected for conversion. A single
conversion of each selected input will be performed and the result placed in the result
register pair which corresponds to the selected input channel. The user may select
whether an interrupt, if enabled, will be generated after either the first four conversions
have occurred or all selected channels have been converted. If the user selects to
generate an interrupt after the four input channels have been converted, a second
interrupt will be generated after the remaining input channels have been converted. If only
a single channel is selected this is equivalent to single channel, single conversion mode.
input MUX
Rev. 4 — 15 June 2010
8-bit microcontroller with accelerated two-clock 80C51 core
comp
DAC0
P89LPC980/982/983/985
CCLK
SAR
8
CONTROL
LOGIC
002aae543
© NXP B.V. 2010. All rights reserved.
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