P89LPC982FDH,529 NXP Semiconductors, P89LPC982FDH,529 Datasheet - Page 61

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P89LPC982FDH,529

Manufacturer Part Number
P89LPC982FDH,529
Description
MCU 80C51 8KB FLASH 28TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC982FDH,529

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
28-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
23
Number Of Timers
5
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935290303529
NXP Semiconductors
P89LPC980_982_983_985
Product data sheet
8.4.4 Auto scan, continuous conversion mode
8.4.5 Dual channel, continuous conversion mode
8.4.6 Single step mode
8.5.1 Timer triggered start
8.5.2 Start immediately
8.5.3 Edge triggered
8.5 Conversion start modes
Any combination of the eight input channels can be selected for conversion. A conversion
of each selected input will be performed and the result placed in the result register pair
which corresponds to the selected input channel. The user may select whether an
interrupt, if enabled, will be generated after either the first four conversions have occurred
or all selected channels have been converted. If the user selects to generate an interrupt
after the four input channels have been converted, a second interrupt will be generated
after the remaining input channels have been converted. After all selected channels have
been converted, the process will repeat starting with the first selected channel. Additional
conversion results will again cycle through the eight result register pairs, overwriting the
previous results. Continuous conversions continue until terminated by the user.
This is a variation of the auto scan continuous conversion mode where conversion occurs
on two user-selectable inputs. The result of the conversion of the first channel is placed in
the result register pair, AD0DAT0R and AD0DAT0L. The result of the conversion of the
second channel is placed in result register pair, AD0DAT1R and AD0DAT1L. The first
channel is again converted and its result stored in AD0DAT2R and AD0DAT2L. The
second channel is again converted and its result placed in AD0DAT3R and AD0DAT3L.
An interrupt is generated, if enabled, after every set of four or eight conversions (user
selectable).
This special mode allows ‘single-stepping’ in an auto scan conversion mode. Any
combination of the eight input channels can be selected for conversion. After each
channel is converted, an interrupt is generated, if enabled, and the A/D waits for the next
start condition. May be used with any of the start modes.
An A/D conversion is started by the overflow of Timer 0. Once a conversion has started,
additional Timer 0 triggers are ignored until the conversion has completed. The Timer
triggered start mode is available in all ADC operating modes.
Programming this mode immediately starts a conversion. This start mode is available in all
ADC operating modes.
An A/D conversion is started by rising or falling edge of P1.4. Once a conversion has
started, additional edge triggers are ignored until the conversion has completed. The edge
triggered start mode is available in all ADC operating modes.
Rev. 4 — 15 June 2010
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC980/982/983/985
© NXP B.V. 2010. All rights reserved.
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