P89LPC9402FBD,557 NXP Semiconductors, P89LPC9402FBD,557 Datasheet - Page 30

• Manufacturer Part Number: P89LPC9402FBD,557
• Description: IC 80C51 MCU FLASH 8K 64-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC9402FBD,557

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 64-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LED, POR, PWM, WDT
• Number Of I /o: 23
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935288631557

NXP Semiconductors
P89LPC9402_1
Product data sheet
7.21 I
The I
connected to the bus, and it has the following features:
A typical I
byte-oriented I
2
Fig 9.
•
•
•
•
•
•
C-bus serial interface
Bidirectional data transfer between masters and slaves
Multi master bus (no central master)
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer
The I
2
C-bus uses two wires (SDA and SCL) to transfer information between devices
2
I
2
2
C-bus may be used for test and diagnostic purposes.
C-bus configuration is shown in
C-bus configuration
I
2
2
C-bus
C-bus interface that supports data transfers up to 400 kHz.
P1.3/SDA
Rev. 01 — 22 April 2009
P89LPC9402
8-bit microcontroller with accelerated two-clock 80C51 core
P1.2/SCL
OTHER DEVICE
WITH I
R P
Figure
INTERFACE
2
C-BUS
9. The P89LPC9402 device provides a
R P
OTHER DEVICE
WITH I
INTERFACE
P89LPC9402
2
C-BUS
002aae474
© NXP B.V. 2009. All rights reserved.
SDA
SCL
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