P89LPC9402FBD,557 NXP Semiconductors, P89LPC9402FBD,557 Datasheet - Page 35

• Manufacturer Part Number: P89LPC9402FBD,557
• Description: IC 80C51 MCU FLASH 8K 64-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC9402FBD,557

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 64-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LED, POR, PWM, WDT
• Number Of I /o: 23
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935288631557

NXP Semiconductors
P89LPC9402_1
Product data sheet
Fig 15. Comparator input and output connections
(P0.5) CMPREF
7.23.1 Internal reference voltage
7.23.2 Comparator interrupt
7.23.3 Comparators and power reduction modes
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
7.23 Analog comparators
V
ref(bg)
Two analog comparators are provided on the P89LPC9402. Input and output options allow
use of the comparators in a number of different configurations. Comparator operation is
such that the output is a logic 1 (which may be read in a register and/or routed to a pin)
when the positive input (one of two selectable pins) is greater than the negative input
(selectable from a pin or an internal reference voltage). Otherwise the output is a zero.
Each comparator may be configured to cause an interrupt when the output value changes.
The overall connections to both comparators are shown in
function to V
When each comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10 s. The corresponding comparator interrupt should not be
enabled during that time, and the comparator interrupt flag must be cleared before the
interrupt is enabled in order to prevent an immediate interrupt service.
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to as
V
Each comparator has an interrupt flag contained in its configuration register. This flag is
set whenever the comparator output changes state. The flag may be polled by software or
may be used to generate an interrupt. The two comparators use one common interrupt
vector. If both comparators enable interrupts, after entering the interrupt service routine,
the user needs to read the flags to determine which comparator caused the interrupt.
Either or both comparators may remain enabled when Power-down or Idle mode is
activated, but both comparators are disabled automatically in Total Power-down mode.
ref(bg)
, is 1.23 V
DD
CP1
CN1
CP2
CN2
= 2.4 V.
comparator 1
comparator 2
10 %.
Rev. 01 — 22 April 2009
8-bit microcontroller with accelerated two-clock 80C51 core
CO1
CO2
change detect
change detect
OE1
OE2
CMF1
CMF2
CMP1 (P0.6)
CMP2 (P0.0)
002aae456
Figure
P89LPC9402
EC
15. The comparators
interrupt
© NXP B.V. 2009. All rights reserved.
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