LPC2923FBD100,551 NXP Semiconductors, LPC2923FBD100,551 Datasheet - Page 10

• Manufacturer Part Number: LPC2923FBD100,551
• Description: IC ARM9 MCU FLASH 256KB 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2900r

Specifications of LPC2923FBD100,551

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 125MHz
• Connectivity: CAN, I²C, LIN, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16K x 8
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 16x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC29
• Core: ARM968E-S
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935287115551

NXP Semiconductors
LPC2921_23_25_3
Product data sheet
6.3 On-chip flash memory system
6.4 On-chip static RAM
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. The ARM968E-S is based on the ARMv5TE five-stage pipeline
architecture. Typically, in a three-stage pipeline architecture, while one instruction is being
executed its successor is being decoded and a third instruction is being fetched from
memory. In the five-stage pipeline additional stages are added for memory access and
write-back cycles.
The ARM968E-S processor also employs a unique architectural strategy known as
THUMB, which makes it ideally suited to high-volume applications with memory
restrictions or to applications where code density is an issue.
The key idea behind THUMB is that of a super-reduced instruction set. Essentially, the
ARM968E-S processor has two instruction sets:
The THUMB set's 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM's performance advantage over a
traditional 16-bit controller using 16-bit registers. This is possible because THUMB code
operates on the same 32-bit register set as ARM code.
THUMB code can provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM controller connected to a 16-bit memory system.
The ARM968E-S processor is described in detail in the ARM968E-S data sheet
The LPC2921/2923/2925 includes a 128 kB, 256 kB, or 512 kB flash memory system.
This memory can be used for both code and data storage. Programming of the flash
memory can be accomplished via the flash memory controller or the JTAG.
The flash controller also supports a 16 kB, byte-accessible on-chip EEPROM integrated
on the LPC2921/2923/2925.
In addition to the two 16 kB TCMs, the LPC2921/2923/2925 includes two static RAM
memories of 16 kB each for a total of 32 kB (LPC2925 only) or one block of 16 kB
(LPC2921/2923). They may be used for code and/or data storage.
The 8 kB SRAM block for the ETB can be used as static memory for code and data
storage as well. However, DMA access to this memory region is not supported.
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Write buffers for the AHB and TCM buses.
Enhanced 16 × 32 multiplier capable of single-cycle MAC operations and 16-bit fixed-
point DSP instructions to accelerate signal-processing algorithms and applications.
Standard 32-bit ARMv5TE set
16-bit THUMB set
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 14 April 2010
ARM9 microcontroller with CAN, LIN, and USB
LPC2921/2923/2925
© NXP B.V. 2010. All rights reserved.
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