M3062GF8NGP#U5 Renesas Electronics America, M3062GF8NGP#U5 Datasheet - Page 124

MCU 3V 64K PB FREE 100-LQFP

M3062GF8NGP#U5

Manufacturer Part Number
M3062GF8NGP#U5
Description
MCU 3V 64K PB FREE 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M3062GF8NGP#U5

Core Processor
M16C/60
Core Size
16-Bit
Speed
10MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Clock synchronous serial I/O mode
Rev.1.1
Figure 1.16.14. The transfer clock output from the multiple pins function usage
Figure 1.16.15. Serial data logic switch timing
(c) Transfer clock output from multiple pins function (UART1)
(d) Continuous receive mode
(e) Serial data logic switch function (UART2)
This function allows the setting two transfer clock output pins and choosing one of the two to output a
clock by using the CLK and CLKS select bit (bits 4 and 5 at address 03B0
The multiple pins function is valid only when the internal clock is selected for UART1.
If the continuous receive mode enable bit (bits 2 and 3 at address 03B0
set to “1”, the unit is placed in continuous receive mode. In this mode, when the receive buffer register
is read out, the unit simultaneously goes to a receive enable state without having to set dummy data to
the transmit buffer register back again.
When the data logic select bit (bit6 at address 037D
reading from receive buffer register, data is reversed. Figure 1.16.15 shows the example of serial data
logic switch timing.
•When LSB first
Transfer clock
(no reverse)
Note: This applies when the internal clock is selected and transmission
(reverse)
Microcomputer
TxD
TxD
is performed only in clock synchronous serial I/O mode.
CLKS
2
2
CLK
T
X
“H”
“H”
“H”
D
“L”
“L”
“L”
1
1
1
(P6
(P6
(P6
7
4
5
)
)
)
D0
D0
D1
D1
D2
D2
IN
CLK
D3
D3
16
D4
D4
) = “1”, and writing to transmit buffer register or
D5
D5
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D6
D6
IN
CLK
D7
D7
16
, bit 5 at address 037D
16
). (See Figure 1.16.14.)
M3062GF8NFP/GP
Mitsubishi microcomputers
16
) is
121

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