M3062GF8NGP#U5 Renesas Electronics America, M3062GF8NGP#U5 Datasheet - Page 31

MCU 3V 64K PB FREE 100-LQFP

M3062GF8NGP#U5

Manufacturer Part Number
M3062GF8NGP#U5
Description
MCU 3V 64K PB FREE 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M3062GF8NGP#U5

Core Processor
M16C/60
Core Size
16-Bit
Speed
10MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Bus Control
28
Rev.1.1
Table 1.9.2. Operation of RD, WRL, and WRH signals
Table 1.9.3. Operation of RD, WR, and BHE signals
Figure 1.9.3. ALE signal and address/data bus
(3) Read/write signals
(4) ALE signal
Data bus width
Data bus width
(BYTE = “H”)
(BYTE = “L”)
With a 16-bit data bus (BYTE pin =“L”), bit 2 of the processor mode register 0 (address 0004
combinations of RD, BHE, and WR signals or RD, WRL, and WRH signals. With an 8-bit data bus (BYTE
pin = “H”), use the combination of RD, WR, and BHE signals. (Set bit 2 of the processor mode register 0
(address 0004
After a reset has been cancelled, the combination of RD, WR, and BHE signals is automatically selected.
When switching to the RD, WRL, and WRH combination, do not write to external memory until bit 2 of the
processor mode register 0 (address 0004
Note: Before attempting to change the contents of the processor mode register 0, set bit 1 of the protect
(BYTE = “L”)
The ALE signal latches the address when accessing the multiplex bus space. Latch the address when the
ALE signal falls.
D
0
/A
16-bit
8-bit
16-bit
0
A
to D
8
register (address 000A
When BYTE pin = “H”
to A
ALE
7
/A
19
7
16
_____ ________
) to “0”.) Tables 1.9.2 and 1.9.3 show the operation of these signals.
RD
H
H
H
H
L
L
L
L
Address
Note 1: Floating when reading.
Note 2: When multiplexed bus for the entire space is selected, these are I/O ports.
RD
H
H
H
L
_____ _________
_____
_____
Address (Note 2)
________
______
WR
16
H
H
H
H
L
L
L
L
______
WRL
) to “1”.
Data (Note 1)
H
H
L
L
_____
_________
Not used
Not used
________
______
_________
BHE
H
H
L
L
L
L
16
WRH
) has been set (Note).
H
H
L
L
_____
_______
________
H / L
H / L
_____
A0
D
Read data
Write 1 byte of data to odd address
Write data to both even and odd addresses
Write 1 byte of data to even address
H
H
L
L
L
L
0
/A
1
______
A
to D
9
When BYTE pin = “L”
to A
Write 1 byte of data to odd address
Read 1 byte of data from odd address
Read 1 byte of data from even address
Read data from both even and odd addresses
Write 1 byte of data
Read 1 byte of data
_________
Write 1 byte of data to even address
Write data to both even and odd addresses
ALE
7
/A
A
19
0
8
Status of external data bus
________
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Status of external data bus
Address
Address
Address
M3062GF8NFP/GP
Data (Note 1)
Mitsubishi microcomputers
16
) select the

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