M3062GF8NGP#U5 Renesas Electronics America, M3062GF8NGP#U5 Datasheet - Page 200

• Manufacturer Part Number: M3062GF8NGP#U5
• Description: MCU 3V 64K PB FREE 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M3062GF8NGP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CPU Rewrite Mode (Flash Memory Version)
Rev.1.1
Data Protect Function (Block Lock)
Status Register
Each block in Figure 1.28.1 has a nonvolatile lock bit to specify that the block be protected (locked)
against erase/write. The lock bit program command is used to set the lock bit to 0 (locked). The lock bit of
each block can be read out using the read lock bit status command.
Whether block lock is enabled or disabled is determined by the status of the lock bit and how the flash
memory control register 0’s lock bit disable select bit is set.
The status register shows the operating state of the flash memory and whether erase operations and
programs ended successfully or in error. It can be read in the following ways.
Table 1.29.2 shows the status register.
Also, the status register can be cleared in the following way.
(1) By writing the clear status register command (50
After a reset, the status register is set to “80
Each bit in this register is explained below.
Sequencer status (SR7)
Erase status (SR5)
(1) When the lock bit disable select bit = “0”, a specified block can be locked or unlocked by the lock bit
(2) When the lock bit disable select bit = 1, all blocks are nonlocked regardless of the lock bit data, so
(1) By reading an arbitrary even address from the user ROM area after writing the read status register
(2) By reading an arbitrary even address from the user ROM area in the period from when the program
After power-on, the sequencer status is set to 1(ready).
The sequencer status indicates the operating status of the device. This status bit is set to “0” (busy)
during write or erase operation and is set to “1” upon completion of these operations.
The erase status informs the operating status of erase operation to the CPU. When an erase error
occurs, it is set to “1”.
The erase status is reset to “0” when cleared.
status (lock bit data). Blocks whose lock bit data = 0 are locked, so they are disabled against erase/
write. On the other hand, the blocks whose lock bit data = “1” are not locked, so they are enabled for
erase/write.
they are enabled for erase/write. In this case, the lock bit data that is “0” (locked) is set to “1”
(nonlocked) after erasure, so that the lock bit-actuated lock is removed.
command (70
starts or erase operation starts to when the read array command (FF
16
)
16
”.
16
)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
) is input
M3062GF8NFP/GP
Mitsubishi microcomputers
197