D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 701

• Manufacturer Part Number: D12312SVF20V
• Description: IC H8S/2312S MCU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVF20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

17.18.2 RAM Overlap
An example in which flash memory block area EB1 is overlapped is shown below.
Example in Which Flash Memory Block Area EB1 Is Overlapped
1. Set bits RAMS, RAM2, RAM1, and RAM0 in RAMER to 1, 0, 0, 1, to overlap part of RAM
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB1).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks
onto the area (EB1) for which real-time programming is required.
H'000000
H'001000
H'002000
H'030000
H'004000
H'005000
H'006000
H'007000
H'008000
H'07FFFF
regardless of the value of RAM2, RAM1, and RAM0 (emulation protection). In this
state, setting the P1 or E1 bit in flash memory control register 1 (FLMCR1), or setting
Figure 17.49 Example of RAM Overlap Operation
Flash memory
EB8 to EB15
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
This area can be accessed
from both the RAM area
and flash memory area
Rev.7.00 Feb. 14, 2007 page 667 of 1108
On-chip RAM
H'FFDC00
H'FFEBFF
H'FFFBFF
REJ09B0089-0700
Section 17 ROM