R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 1011

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
16.4.6
The logic levels at the SCL and SDA pins are routed through noise cancelers before being latched
internally. Figure 16.13 shows a block diagram of the noise canceler circuit.
The noise canceler consists of two cascaded latches and a match detector. The SCL (or SDA)
input signal is sampled on the system clock, but is not passed forward to the next circuit unless the
outputs of both latches agree. If they do not agree, the previous value is held.
16.4.7
Flowcharts in respective modes that use the I
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
SCL or SDA
input signal
Sampling
clock
Noise Canceler
Example of Use
Figure 16.13 Block Diagram of Noise Canceler
Sampling clock
D
System clock
period
Latch
C
Q
D
2
C bus interface are shown in figures 16.14 to 16.17.
Latch
C
Q
March detector
Section 16 I2C Bus Interface 2 (IIC2)
SCL or SDA
Internal
signal
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