R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 486

MCU 256KB FLASH 64K 144-LQFP

R4F24269NVFQV

Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24269NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 8 EXDMA Controller (EXDMAC)
(2)
When the EDA bit is set to 1 in EDMDR, an EXDMA transfer cycle is started a minimum of three
cycles later. Once transfer is started, it continues (as a burst) until the transfer end condition is
satisfied.
If the BGUP bit is 1 in EDMDR, the bus is transferred in the event of a bus request from another
bus master.
Transfer requests for other channels are held pending until the end of transfer on the current
channel.
Figures 8.31 to 8.34 show operation timing examples for various conditions.
Page 456 of 1372
φ pin
Bus cycle
CPU
operation
ETEND
EDA bit
Auto Request/Burst Mode/Normal Transfer Mode
CPU cycle CPU cycle
External
1
space
Figure 8.31 Auto Request/Burst Mode/Normal Transfer Mode
External
space
(CPU Cycles/Dual Address Mode/BGUP = 0)
EXDMA
External
space
read
EXDMA
write
EXDMA
read
EXDMA
write
Repeated
H8S/2426, H8S/2426R, H8S/2424 Group
Last transfer cycle
EXDMA
read
REJ09B0466-0350 Rev. 3.50
EXDMA
write
Jul 09, 2010
CPU cycle
0

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