R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 574

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 I/O Ports
• P12/TEND0/PO10/TIOCC0/TCLKA
[Legend]
x:
Notes: 1. TIOCC0 input when MD3 to MD0 = B'0000 and IOC3 to IOC0 = B'10xx.
Page 544 of 1372
TEE0
TPU channel 0
settings
P12DDR
NDER10
Pin function
TPU channel 0
settings
MD3 to MD0
IOC3 to IOC0
CCLR2 to
CCLR0
Output function
The pin function is switched as shown below according to the combination of bit TEE0 in
DMATCR of the DMAC, TPU channel 0 settings (by bits MD3 to MD0 in TMDR_0, bits
IOC3 to IOC0 in TIORL_0, and bits CCLR2 to CCLR0 in TCR_0), bits TPSC2 to TPSC0 in
TCR_0 to TCR_5, bit NDER10 in NDERH of the PPG, and bit P12DDR.
Don't care
2. TCLKA input when the setting for any of TCR_0 to TCR_5 is TPSC2 to TPSC0 = B'100.
3. TIOCD0 output disabled. Output disabled and settings (2) effective when BFA = 1 or
TCLKA input when phase counting mode is set for channels 1 and 5.
BFB = 1 in TMDR_0.
TIOCC0 output
(1) in table
B'0000,
B'0100,
B'1xxx
below
(2)
⎯
⎯
⎯
⎯
B'0000
B'0001 to
B'0101 to
compare
B'0011,
B'0111
Output
output
(1)
⎯
P12 input
⎯
0
B'001x
B'xx00
0
(2) in table below
(2)
⎯
⎯
TCLKA input*
P12 output
1
0
TIOCC0 input*
Other than
mode 1
PWM*
B'0010
B'xx00
output
(1)
⎯
2
H8S/2426, H8S/2426R, H8S/2424 Group
PO10 output
3
PWM mode
1
Other than
1
1
2 output
B'101
REJ09B0466-0350 Rev. 3.50
Other than B'xx00
(1)
B'0011
TEND0 output
B'101
⎯
Jul 09, 2010
⎯
⎯
1
(2)
⎯