R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 261

MCU 256KB FLASH 64K 144-LQFP

R4F24269NVFQV

Manufacturer Part Number
R4F24269NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24269NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
6.7.9
There are two ways of inserting wait states in a DRAM access cycle: program wait insertion and
pin wait insertion using the WAIT pin.
Wait states are inserted to extend the CAS assertion period in a read access to DRAM space, and
to extend the write data setup time relative to the falling edge of CAS in a write access.
(1)
When the bit in ASTCR corresponding to an area designated as DRAM space is set to 1, from 0 to
7 wait states can be inserted automatically between the T
settings in WTCR.
(2)
When the WAITE bit in BCR is set to 1 and the ASTCR bit is set to 1, wait input by means of the
WAIT pin is enabled. When DRAM space is accessed in this state, a program wait (T
inserted. If the WAIT pin is low at the falling edge of φ in the last T
is inserted. If the WAIT pin is held low, T
Figures 6.38 and 6.39 show examples of wait cycle insertion timing in the case of 2-state and 3-
state column address output cycles.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Program Wait Insertion
Pin Wait Insertion
Wait Control
w
states are inserted until it goes high.
c1
state and T
c1
or T
c2
state, according to the
Section 6 Bus Controller (BSC)
w
state, another T
Page 231 of 1372
w
) is first
w
state

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