R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 712

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 I/O Ports
Notes: 1. Not supported in the H8S/2426 Group.
Page 682 of 1372
Bit
0
2. Not supported in the 5-V version.
Bit Name
PH0DDR
Initial Value
0
R/W
W
Description
•
Pin PH1 functions as the SDRAMφ*
when the SDPSTP bit is 0 in the H8S/2426R
Group. In the H8S/2426 Group or when the
SDPSTP bit is 1 in the H8S/2426R Group, if bit
CS5E is set to 1 while area 5 is specified as
normal space, pin PH1 functions as the CS5
output pin when bit PH1DDR is set to 1, and
functions as an I/O port when the bit is cleared to
0. When bit CS5E is cleared to 0, pin PH1 is an
I/O port, and its function can be switched with bit
PH1DDR. When area 5 is specified as DRAM
space*
functions as the RAS5*
port when the bit is cleared to 0.
Pin PH0 functions as the CS4 output pin when
area 4 is specified as normal space and bit
PH0DDR is set to 1. If bit PH0DDR is cleared to
0, pin PH0 functions as an I/O port. When bit
CS4E is cleared to 0, pin PH0 is an I/O port, and
its function can be switched with bit PH0DDR.
When area 4 is specified as DRAM space*
bit CS4E is set to 1, pin PH0 functions as the
RAS4*
is cleared to 0. When areas 2 to 5 are specified as
continuous SDRAM space*
the WE output pin when bit CS4E is set to 1, and
as an I/O port when the bit is cleared to 0.
Mode 7 (when EXPE = 0)
Pins PH3, PH2, and PH0 are I/O ports, and their
functions can be switched with PHDDR.
Pin PH1 functions as the SDRAMφ*
when the SDPSTP bit is 0 in the H8S/2426R
Group. In the H8S/2426 Group or when the
SDPSTP bit is 1 in the H8S/2426R Group, pin
PH1 is an I/O port and its function can be
switched with PHDDR.
2
2
output pin and as an I/O port when the bit
and bit CS5E is set to 1, pin PH1
H8S/2426, H8S/2426R, H8S/2424 Group
2
output pin and as an I/O
1
REJ09B0466-0350 Rev. 3.50
, pin PH0 functions as
1
1
output pin
output pin
Jul 09, 2010
2
and