R4F24269NVFQV Renesas Electronics America, R4F24269NVFQV Datasheet - Page 710

• Manufacturer Part Number: R4F24269NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24269NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 I/O Ports
• PG2/CS2/RAS2*
Notes: 1. Not supported in the H8S/2426 Group and H8S/2424 Group.
• PG1/CS1, PG0/CS0
[Legend]
n = 1 or 0
Page 680 of 1372
Operating
mode
EXPE
CS2E
RMTS2 to
RMTS0
PG2DDR
Pin function PG2
Operating
mode
EXPE
CSnE
PGnDDR
Pin
function
The pin function is switched as shown below according to the combination of the operating
mode, bits RMTS2 to RMTS0 in DRAMCR of the bus controller, bit CS2E in PFCR0, and bit
PG2DDR.
The pin function is switched as shown below according to the combination of the operating
mode, bit CSnE in PFCR0, and bit PGnDDR.
2. Not supported in the 5-V version.
input
0
⎯
0
input
output
PGn
PG2
0
1
input
0
normal space
PG2
2
Area 2 is in
/RAS*
0
output
PGn
1
output
CS2
1, 2, 4
1, 2, 4
1
⎯
1
⎯
DRAM space,
DRAM space
areas 2 to 5
input
Area 2 is in
PGn
continuous
RAS2*
1
output
0
are in
⎯
2
1
output
CSn
Areas 2 to
synchro-
5 are in
DRAM
1
RAS*
output
space
nous
⎯
1
input
input
PGn
PG2
0
0
⎯
⎯
0
output
⎯
PG2
0
1
output
PGn
1
input
PG2
0
⎯
0
output
PG2
input
PGn
1
H8S/2426, H8S/2426R, H8S/2424 Group
0
input
PG2
normal space
Area 2 is in
0
0
7
7
output
PGn
output
REJ09B0466-0350 Rev. 3.50
CS2
1
1
1
1
DRAM space,
DRAM space
areas 2 to 5
Area 2 is in
continuous
RAS2*
input
PGn
output
1
are in
⎯
0
2
1
Jul 09, 2010
output
Areas 2 to
synchro-
CSn
5 are in
DRAM
RAS*
output
space
nous
1
⎯
1