HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 120

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 5 Interrupt Controller
Interrupt Priority Register A (IPRA): IPRA is an 8-bit readable/writable register in which
interrupt priority levels can be set.
IPRA is initialized to H'00 by a reset and in hardware standby mode.
Rev. 4.00 Jan 26, 2006 page 96 of 938
REJ09B0276-0400
Bit
Initial value
Read/Write
Priority level A7
Selects the priority level of IRQ interrupt requests
IPRA7
R/W
7
0
Priority level A6
Selects the priority level of IRQ interrupt requests
IPRA6
R/W
6
0
Priority level A5
Selects the priority level of IRQ and IRQ interrupt requests
IPRA5
R/W
5
0
Priority level A4
Selects the priority level of IRQ and IRQ
interrupt requests
0
IPRA4
R/W
4
0
Priority level A3
Selects the priority level of WDT,
DRAM interface, and A/D converter
interrupt requests
1
IPRA3
R/W
3
0
Priority level A2
Selects the priority level of
16-bit timer channel 0 interrupt
requests
2
IPRA2
R/W
2
0
Priority level A1
Selects the priority level
of 16-bit timer channel 1
interrupt requests
4
3
IPRA1
R/W
1
0
Priority
level A0
Selects the
priority level
of 16-bit timer
channel 2
interrupt
requests
5
IPRA0
R/W
0
0

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