HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 90

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 3 MCU Operating Modes
3.3
SYSCR is an 8-bit register that controls the operation of the H8/3067 Group.
Bit 7—Software Standby (SSBY): Enables transition to software standby mode. (For further
information about software standby mode see section 20, Power-Down State.)
When software standby mode is exited by an external interrupt, this bit remains set to 1. To clear
this bit, write 0.
Bit 7
SSBY
0
1
Rev. 4.00 Jan 26, 2006 page 66 of 938
REJ09B0276-0400
Bit
Initial value
Read/Write
System Control Register (SYSCR)
Description
SLEEP instruction causes transition to sleep mode
SLEEP instruction causes transition to software standby mode
SSBY
Software standby
Enables transition to software standby mode
R/W
7
0
STS2
R/W
Standby timer select 2 to 0
These bits select the waiting time at
recovery from software standby mode
6
0
STS1
R/W
5
0
STS0
R/W
4
0
User bit enable
Selects whether to use the UI bit in CCR
as a user bit or an interrupt mask bit
R/W
UE
3
1
NMI edge select
Selects the valid edge
of the NMI input
NMIEG
R/W
2
0
Software standby output port enable
Selects the output state of the address bus
and bus control signals in software standby mode
SSOE
R/W
1
0
RAM enable
Enables or
disables
on-chip RAM
RAME
R/W
0
1
(Initial value)

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