HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 299

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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8.3
8.3.1
Port 2 is an 8-bit input/output port with the pin configuration shown in figure 8.2. The pin
functions differ according to the operating mode.
In modes 1 to 4 (expanded modes with on-chip ROM disabled), port 2 consists of address bus
output pins (A
port 2 data direction register (P2DDR) can designate pins for address bus output (A
generic input. In mode 6 and 7 (single-chip mode), port 2 is a generic input/output port.
When DRAM is connected to areas 2 to 5, A
write cycles. For details see section 6.5, DRAM Interface.
Port 2 has software-programmable built-in pull-up transistors.
Pins in port 2 can drive one TTL load and a 90-pF capacitive load. They can also drive an LED or
a darlington transistor pair.
Port 2
Port 2
Overview
15
to A
8
Port 2 pins
). In modes 5 (expanded modes with on-chip ROM enabled), settings in the
P2 /A
P2 /A
P2 /A
P2 /A
P2 /A
P2 /A
P2 /A
P2 /A
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
Figure 8.2 Port 2 Pin Configuration
Modes 1 to 4
A
A
A
A
A
A
A (output)
A (output)
15
14
13
12
11
10
9
8
(output)
(output)
(output)
(output)
(output)
(output)
12
to A
8
Modes 5
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
output row and column addresses in read and
7
6
5
4
3
2
1
0
Rev. 4.00 Jan 26, 2006 page 275 of 938
15
14
13
12
11
10
9
8
(output)
(output)
(output)
(output)
(output)
(output)
(output)
(output)
Mode 6 and 7
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
Section 8 I/O Ports
REJ09B0276-0400
7
6
5
4
3
2
1
0
15
to A
8
) or

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