DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 215

IC H8SX/1657 MCU FLASH 120TQFP

DF61657CN35FTV

Manufacturer Part Number
DF61657CN35FTV
Description
IC H8SX/1657 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61657CN35FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
35MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
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Part Number:
DF61657CN35FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.7.3
Table 6.16 shows the pins used for the byte control SRAM interface.
In the byte control SRAM interface, write strobe signals (LHWR and LLWR) are output from the
byte select strobes. The RD/WR signal is used as a write enable signal.
Table 6.16 I/O Pins for Byte Control SRAM Interface
Pin
AS/AH
CSn
RD
RD/WR
LHWR/LUB LUB
LLWR/LLB
WAIT
A23 to A0
D15 to D0
I/O Pins Used for Byte Control SRAM Interface
When Byte Control
SRAM is Specified Name
AS
CSn
RD
RD/WR
LLB
WAIT
A23 to A0
D15 to D0
Address
strobe
Chip select
Read strobe Output Output enable for the SRAM when the
Read/write
Lower-upper
byte select
Lower-lower
byte select
Wait
Address pin Output Address output pin
Data pin
I/O
Output Strobe signal indicating that the address
Output Strobe signal indicating that area n is
Output Write enable signal for the SRAM when
Output Upper byte select when the 16-bit byte
Output Lower byte select when the 16-bit byte
Input
Input/
output
Wait request signal used when an
Function
output on the address bus is valid when
a basic bus interface space or byte
control SRAM space is accessed
selected
byte control SRAM space is accessed
the byte control SRAM space is
accessed
control SRAM space is accessed
control SRAM space is accessed
external address space is accessed
Data input/output pin
Rev. 2.00 Jun. 28, 2007 Page 189 of 864
Section 6 Bus Controller (BSC)
REJ09B0341-0200

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