DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 383

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.1.6
ODR is an 8-bit readable/writable register that selects the open-drain output function.
If a bit in ODR is set to 1, the pin corresponding to that bit in ODR functions as an NMOS open-
drain output. If a bit in ODR is cleared to 0, the pin corresponding to that bit in ODR functions as
a CMOS output.
The initial value of ODR is H'00.
9.2
This section describes the output priority of each pin.
The name of each peripheral module pin is followed by “_OE”. This (for example: TIOCA4_OE)
indicates whether the output of the corresponding function is valid (1) or if another setting is
specified (0). Table 9.5 lists each port output signal's valid setting. For details on the
corresponding output signals, see the register description of each peripheral module. If the name
of each peripheral module pin is followed by A or B, the pin function can be modified by the port
function control register (PFCR). For details, see section 9.3, Port Function Controller.
For a pin whose initial value changes according to the activation mode, “Initial value E” indicates
the initial value when the LSI is started up in external extended mode and “Initial value S”
indicates the initial value when the LSI is started in single-chip mode.
Bit
Bit Name
Initial Value
R/W
Open-Drain Control Register (PnODR) (n = 2 and F)
Output Buffer Control
Pn7ODR
R/W
7
0
Pn6ODR
R/W
6
0
Pn5ODR
R/W
5
0
Pn4ODR
R/W
4
0
Pn3ODR
R/W
3
0
Rev. 2.00 Jun. 28, 2007 Page 357 of 864
Pn2ODR
R/W
2
0
Pn1ODR
R/W
1
0
Section 9 I/O Ports
REJ09B0341-0200
Pn0ODR
R/W
0
0