UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 241

• Manufacturer Part Number: UPD78F0551MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0551MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
(3) Example of setting procedure when using the subsystem clock as the CPU clock
(4) Example of setting procedure when stopping the subsystem clock
<1> Setting subsystem clock oscillation
<2> Switching the CPU clock (PCC register)
<1> Confirming the CPU clock status (PCC and MCM registers)
<2> Stopping the subsystem clock (OSCCTL register)
Cautions 1.
(Refer to 5.6.3 (1) Example of setting procedure when oscillating the XT1 clock and (2) Example of
setting procedure when using the external subsystem clock.)
Note The setting of <1> is not necessary when while the subsystem clock is operating.
When CSS is set to 1, the subsystem clock is supplied to the CPU.
Confirm with CLS and MCS that the CPU is operating on a clock other than the subsystem clock.
When CLS = 1, the subsystem clock is supplied to the CPU, so change the CPU clock to a clock other than
the subsystem clock.
When OSCSELS is cleared to 0, XT1 oscillation is stopped (the input of the external clock is disabled).
CSS
CLS
2.
0
0
1
1
Be sure to confirm that CLS = 0 when clearing OSCSELS to 0. In addition, stop the watch
timer if it is operating on the subsystem clock.
The subsystem clock oscillation cannot be stopped using the STOP instruction.
PCC2
MCS
0
1
×
0
0
0
0
1
Other than above
Internal high-speed oscillation clock
High-speed system clock
Subsystem clock
PCC1
0
0
1
1
0
Note
PCC0
0
1
0
1
0
f
Setting prohibited
SUB
CPU Clock Status
CPU Clock (f
CHAPTER 5 CLOCK GENERATOR
CPU
) Selection
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