UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 516

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UPD78F0551MA-FAA-AX

Manufacturer Part Number
UPD78F0551MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0551MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Remark
Condition for clearing (CLD0 = 0)
• When the SCLA0 pin is at low level
• When IICE0 = 0 (operation stop)
• Reset
Condition for clearing (DAD0 = 0)
• When the SDAA0 pin is at low level
• When IICE0 = 0 (operation stop)
• Reset
Digital filter can be used only in fast mode.
In fast mode, the transfer clock does not vary, regardless of the DFC0 bit being set (1) or cleared (0).
The digital filter is used for noise elimination in fast mode.
SMC0
DAD0
DFC0
CLD0
0
1
0
1
0
1
0
1
IICE0: Bit 7 of IICA control register 0 (IICACTL0)
Figure 15-8. Format of IICA Control Register 1 (IICACTL1) (2/2)
The SCLA0 pin was detected at low level.
The SCLA0 pin was detected at high level.
The SDAA0 pin was detected at low level.
The SDAA0 pin was detected at high level.
Operates in standard mode.
Operates in fast mode.
Digital filter off.
Digital filter on.
Detection of SDAA0 pin level (valid only when IICE0 = 1)
Detection of SCLA0 pin level (valid only when IICE0 = 1)
Digital filter operation control
Operation mode switching
Condition for setting (CLD0 = 1)
• When the SCLA0 pin is at high level
Condition for setting (DAD0 = 1)
• When the SDAA0 pin is at high level
CHAPTER 15 SERIAL INTERFACE IICA
502

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