UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 34

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UPD78F0551MA-FAA-AX

Manufacturer Part Number
UPD78F0551MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0551MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
<R>
78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
AMP0OUT
Note
Cautions 1. V
Remark Functions in parentheses ( ) in the figure above can be assigned by setting the port alternate switch control
(2) 25-pin products
RxD6/P61<LINSEL>
ANI0/P20-ANI6/P26
Note
μ
AMP0+
/PGAIN
AMP0-
PD78F0565, 78F0566, 78F0567 (products with operational amplifier) only
(TI000)/P121
(TOH1)/P00
(TOH1)/P34
SDAA0/P61
SCLA0/P60
SCK11/P35
register (MUXSEL).
2. Connect the REGC pin to V
3. ANI0/P20/AMP0-, ANI1/P21/AMP0OUT/PGAIN, ANI2/P22/AMP0+, and ANI3/P23 to ANI6/P26 are set
4. RESET/P125 immediately after release of reset is set in the external reset input.
5. Set P30 and P01 to output mode (PM30 = PM01 = 0) by using software after release of reset.
(TI51)/P00
(TI51)/P34
TI000/P00
RxD6/P61
SO11/P37
TxD6/P60
SI11/P36
Note
Note
Note
REGC
a stabilized GND (= 0 V).
in the analog input mode after release of reset.
AV
/P22
/P20
/P21
SS
REF
functions alternately as the ground potential of the A/D converter. Be sure to connect V
7
WATCHDOG TIMER
16-bit TIMER/
EVENT COUNTER 00
SERIAL
INTERFACE CSI11
8-bit TIMER/
EVENT COUNTER 51
SERIAL
INTERFACE UART6
A/D CONVERTER
SERIAL
INTERFACE IICA
AMPLIFIER 0
VOLTAGE
REGULATOR
OPERATIONAL
8-bit TIMER H1
OSCILLATOR
LOW-SPEED
INTERNAL
LINSEL
Note
SS
via a capacitor (0.47 to 1
CORE
78K/0
CPU
HIGH-SPEED
INTERNAL
V
DD
RAM
V
MEMORY
FLASH
SS
μ
F).
POWER ON CLEAR/
RESET CONTROL
ON-CHIP DEBUG
LOW VOLTAGE
HIGH-SPEED
OSCILLATOR
INTERRUPT
INDICATOR
CONTROL
CONTROL
INTERNAL
PORT 12
SYSTEM
PORT 0
PORT 2
PORT 3
PORT 6
CHAPTER 1 OUTLINE
2
7
7
2
3
4
CONTROL
POC/LVI
P121, P122, P125
P00, P02
P20-P26
P31-P37
P60, P61
TOOLC0/X1, TOOLC1/P31
TOOLD0/X2, TOOLD1/P32
RESET/P125
X1/P121
X2/EXCLK/P122
RxD6/P61<LINSEL>
INTP0/P00
(INTP0)/P121
INTP2/P31, INTP3/P32,
INTP4/P34, INTP5/P02
SS
to
20

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