UPD78F0551MA-FAA-AX Renesas Electronics America, UPD78F0551MA-FAA-AX Datasheet - Page 482

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UPD78F0551MA-FAA-AX

Manufacturer Part Number
UPD78F0551MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0551MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
(2) Communication operation
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
(a) Format and waveform example of normal transmit/receive data
Figures 14-15 and 14-16 show the format and waveform example of the normal transmit/receive data.
1. LSB-first transmission/reception
2. MSB-first transmission/reception
One data frame consists of the following bits.
• Start bit ... 1 bit
• Character bits ... 7 or 8 bits
• Parity bit ... Even parity, odd parity, 0 parity, or no parity
• Stop bit ... 1 or 2 bits
The character bit length, parity, and stop bit length in one data frame are specified by asynchronous serial
interface operation mode register 6 (ASIM6).
Whether data is communicated with the LSB or MSB first is specified by bit 1 (DIR6) of asynchronous serial
interface control register 6 (ASICL6).
Whether the T
X
Start
Start
D6 pin outputs normal or inverted data is specified by bit 0 (TXDLV6) of ASICL6.
bit
bit
Figure 14-15. Format of Normal UART Transmit/Receive Data
D0
D7
D1
D6
D2
D5
D3
D4
Character bits
Character bits
1 data frame
1 data frame
D4
D3
D5
D2
D6
D1
CHAPTER 14 SERIAL INTERFACE UART6
D7
D0
Parity
Parity
bit
bit
Stop bit
Stop bit
468

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