CY8C26233-24PVI Cypress Semiconductor Corp, CY8C26233-24PVI Datasheet - Page 111
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CY8C26233-24PVI
Manufacturer Part Number
CY8C26233-24PVI
Description
IC MCU 8K FLASH 256B 20-SSOP
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ CY8C26xxxr
Datasheet
1.CY8C25122-24PI.pdf
(148 pages)
Specifications of CY8C26233-24PVI
Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.25 V
Data Converters
A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
CapSense
Technology
CMOS
Processing Unit
Microcontroller
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Package Type
SSOP
Screening Level
Industrial
Pin Count
20
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1426
428-1426-5
428-1426
428-1426-5
428-1426
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY8C26233-24PVI
Manufacturer:
CY
Quantity:
431
This filter is implemented using a combination of hard-
ware and software resources. Hardware is used to accu-
mulate the high-speed in-coming data while the software
Table 90:
Decimator Incremental Register (DEC_CR, Address = Bank 0, E6h)
Table 91:
Decimator High Register (DEC_DH / DEC_CL, Address = Bank 0, E4h)
Table 92:
Decimator Data Low Register (DEC_DL, Address = Bank 0, E5h)
September 5, 2002
Bit [7:4] : IGEN [3:0] Individual enables for each analog column that gates the Analog Comparator based on the
ICCKSEL input (Bit 3)
Bit 3 : ICCKSEL Clock select for Incremental gate function
0 = Digital Basic Type A Block 02
1 = Digital Communications Type A Block 06
Bit [2:1] : DCol [1:0] Selects Analog Column Comparator source
0 0 = Analog Column Comparator 0
0 1 = Analog Column Comparator 1
1 0 = Analog Column Comparator 2
1 1 = Analog Column Comparator 3
Bit 0 : DCLKSEL Clock select for Decimator latch
0 = Digital Basic Type A Block 02
1 = Digital Communications Type A Block 06
Bit [7:0] : Data [7:0]
8-bit data value when read is the high order byte within the 16-bit decimator data registers
Any 8-bit data value when written will cause both the Decimator Data High (DEC_DH) and Decimator Data Low
(DEC_DL) registers to be cleared
Bit [7:0] : Data [7:0]
8-bit data value when read is the low order byte within the 16 bit decimator data registers
Read/Write
Read/Write
Read/Write
Bit Name
Bit Name
Bit Name
Bit #
POR
Bit #
POR
Bit #
POR
Decimator/Incremental Control Register
Decimator Data High Register
Decimator Data Low Register
IGEN [3]
Data [7]
Data [7]
RW
RW
7
0
R
7
0
7
0
IGEN [2]
RW
Data [6]
Data [6]
6
0
RW
R
6
0
6
0
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
IGEN [1]
RW
5
0
Data [5]
Data [5]
RW
R
5
0
5
0
IGEN [0]
RW
4
0
Data [4]
Data [4]
RW
R
4
0
4
0
is used to process the lower speed, enhanced resolution
data for output.
ICCKSEL
RW
Data [3]
3
0
Data [3]
RW
3
0
R
3
0
DCol [1]
Data [2]
RW
RW
2
0
Data [2]
2
0
R
2
0
Special Features of the CPU
Data [1]
DCol [0]
RW
RW
1
0
Data [1]
1
0
R
1
0
DCLKSEL
Data [0]
Data [0]
RW
RW
0
0
0
0
R
0
0
111