CY8C26233-24PVI Cypress Semiconductor Corp, CY8C26233-24PVI Datasheet - Page 118
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CY8C26233-24PVI
Manufacturer Part Number
CY8C26233-24PVI
Description
IC MCU 8K FLASH 256B 20-SSOP
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ CY8C26xxxr
Datasheet
1.CY8C25122-24PI.pdf
(148 pages)
Specifications of CY8C26233-24PVI
Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.25 V
Data Converters
A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
CapSense
Technology
CMOS
Processing Unit
Microcontroller
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Package Type
SSOP
Screening Level
Industrial
Pin Count
20
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1426
428-1426-5
428-1426
428-1426-5
428-1426
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY8C26233-24PVI
Manufacturer:
CY
Quantity:
431
11.7
An internal bandgap voltage reference source is pro-
vided on-chip. This reference is used for the Supply Volt-
age Monitor, and can also be accessed by the user as a
reference voltage for analog operations. There is a
Bandgap Oscillator Trim Register (BDG_TR) used to cal-
ibrate this reference into specified tolerance. Factory-
programmed trim values are available for 5.0V and 3.3V
Table 96:
1.
Bandgap Trim Register (BDG_TR, Address = Bank 1, EAh)
11.8
The parts in this family have a Supervisor ROM to man-
age the programming, erasure, and protection of the on-
chip Flash user program space. The Supervisor ROM
also gives the user the capability to read the internal
product ID, access factory trim values, as well as calcu-
late checksums on blocks of the Flash memory space.
The System Supervisor Call instruction (SSC, opcode/
byte 00h) provides the method for the user to access the
pre-existing routines in the Supervisor ROM to imple-
ment these functions. This instruction sets the Flags
Register (CPU_F) bit 3 to 1 and performs an interrupt to
address 0000 into the Supervisory ROM. The flag and
old PC are pushed onto the Stack. The fact that the flag
pushed has F[3] = 1 is irrelevant as the RETI instruction
always clears F[3]. The Supervisory code at 0000 does a
JACC table lookup based on the Accumulator value,
which is effectively another level of instruction encoding.
This service table implements the vectors to the various
supervisory functions. The user must set several param-
118
Bit 7 : FMRD
0 = Enable voltage divider between BG and Flash (User must not use other than this setting)
1 = Disable voltage divider between BG and Flash (Test purposes only)
Bit [6:4] : BGT [2:0] Provides Temperature Curve compensation
Bit [3:0] : BGO [3:0] Provides +/- 5% Offset Trim to center Vbg to 1.30V
Read/Write
Bit Name
FS = Factory set trim value
Bit #
POR
Internal Voltage Reference
Supervisor ROM/System Supervisor Call Instruction
Bandgap Trim Register
FMRD
FS
W
7
1
BGT[2]
FS
W
6
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
1
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
BGT[1]
FS
W
5
1
BGT[0]
FS
W
4
1
operation. The 5.0V value is loaded in the BDG_TR reg-
ister upon reset. This register must be adjusted when
operating voltage outside the range for which factory cal-
ibration was set. Changing the factory-programmed trim
value is done using the Table Read Supervisor Call rou-
tine, and is documented in 11.8.
eters when utilizing these functions. The parameters are
written to 5 bytes of an 8-byte block near the top of RAM
memory space.
Access to these functions must be through the Flash
APIs provided in PSoC Designer and described in Appli-
cation Note AN2015.
The following table documents each function, as well as
the required parameter values:
BGO[3]
FS
W
3
1
BGO[2]
FS
W
2
1
BGO[1]
FS
W
1
1
September 5, 2002
BGO[0]
FS
W
0
1