CY8C26233-24PVI Cypress Semiconductor Corp, CY8C26233-24PVI Datasheet - Page 53
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CY8C26233-24PVI
Manufacturer Part Number
CY8C26233-24PVI
Description
IC MCU 8K FLASH 256B 20-SSOP
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ CY8C26xxxr
Datasheet
1.CY8C25122-24PI.pdf
(148 pages)
Specifications of CY8C26233-24PVI
Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.25 V
Data Converters
A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
CapSense
Technology
CMOS
Processing Unit
Microcontroller
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Package Type
SSOP
Screening Level
Industrial
Pin Count
20
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1426
428-1426-5
428-1426
428-1426-5
428-1426
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY8C26233-24PVI
Manufacturer:
CY
Quantity:
431
Table 50:
Digital Basic Type A Block 00 Output Register
Digital Basic Type A Block 01 Output Register
Digital Basic Type A Block 02 Output Register
Digital Basic Type A Block 03 Output Register
Digital Communications Type A Block 04 Output Register
Digital Communications Type A Block 05 Output Register
Digital Communications Type A Block 06 Output Register
Digital Communications Type A Block 07 Output Register
The Primary Output is the source for “Previous Digital PSoC Block” or “Digital Block 03,” selections for the “Clock
Source Select” in the Digital Basic Type A/Communications Type A Block xx Input Register
A digital PSoC block may have 0, 1, or 2 outputs depending on its function, as shown in the following table:
September 5, 2002
Bit 7 : Reserved
Bit 6 : Reserved
Bit 5 : AUX Out Enable
0 = Disable Auxiliary Output
1 = Enable Auxiliary Output (function dependent)
Bit [4:3] : AUX IO Sel [1:0] Function-dependent selection of auxiliary input or output
0 0 = Input from Global Input[0] or Drive Global Output[0] (for Digital Blocks 00 to 03) or
0 1 = Input from Global Input[1] or Drive Global Output[1] (for Digital Blocks 00 to 03) or
1 0 = Input from Global Input[2] or Drive Global Output[2] (for Digital Blocks 00 to 03) or
1 1 = Input from Global Input[3] or Drive Global Output[3] (for Digital Blocks 00 to 03) or
Bit 2 : Out Enable
0 = Disable Primary Output
1 = Enable Primary Output (function dependant)
Bit [1:0] : Out Sel [1:0] Primary Output
0 0 = Drive Global Output[0] (for Digital Blocks 00 to 03) or Drive Global Output[4] (for Digital Blocks 04 to 07)
0 1 = Drive Global Output[1] (for Digital Blocks 00 to 03) or Drive Global Output[5] (for Digital Blocks 04 to 07)
1 0 = Drive Global Output[2] (for Digital Blocks 00 to 03) or Drive Global Output[6] (for Digital Blocks 04 to 07)
1 1 = Drive Global Output[3] (for Digital Blocks 00 to 03) or Drive Global Output[7] (for Digital Blocks 04 to 07)
Bit Name
Read/
Write
Bit #
POR
Input from Global Input[4] or Drive Global Output [4] (for Digital Blocks 04 to 07)
Input from Global Input[5] or Drive Global Output[5] (for Digital Blocks 04 to 07)
Input from Global Input[6] or Drive Global Output[6] (for Digital Blocks 04 to 07)
Input from Global Input[7] or Drive Global Output[7] (for Digital Blocks 04 to 07)
Digital Basic Type A / Communications Type A Block xx Output Register
Reserved
RW
7
0
Reserved
RW
6
0
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
AUX Out
Enable
RW
5
0
AUX IO Sel
RW
[1]
4
0
(DBA03OU, Address = Bank 1, 2Eh)
(DCA04OU, Address = Bank 1, 32h)
(DCA05OU, Address = Bank 1, 36h)
(DCA06OU, Address = Bank 1, 3Ah)
(DBA00OU, Address = Bank 1, 22h)
(DBA01OU, Address = Bank 1, 26h)
(DBA02OU, Address = Bank 1, 2Ah)
(DCA07OU, Address = Bank 1, 3Eh)
AUX IO Sel
RW
[0]
3
0
Enable
RW
Out
2
0
(Table 48 on page
Out Sel
RW
[1]
Digital PSoC Blocks
1
0
Out Sel
51).
RW
[0]
0
0
53