MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 105

• Manufacturer Part Number: MC68HC908GP32CP
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

6.6.3 Break Status Register
MC68HC908GP32
MOTOROLA
•
MC68HC08GP32
;
HIBYTE
LOBYTE
DOLO
RETURN
Note: Writing a logic 0 clears SBSW.
Address:
The SIM break status register (SBSR) contains a flag to indicate that a
break caused an exit from stop or wait mode. The flag is useful in
applications requiring a return to stop or wait mode after exiting from a
break interrupt.
SBSW — SIM Break Stop/Wait Bit
SBSW can be read within the break interrupt routine. The user can
modify the return address on the stack by subtracting 1 from it. The
following code is an example.
This code works if the H register was stacked in the break interrupt
routine. Execute this code at the end of the break interrupt routine.
Reset:
Read:
Write:
This read/write bit is set when a break interrupt causes an exit from
stop or wait mode. Clear SBSW by writing a logic 0 to it. Reset clears
SBSW.
EQU
EQU
If not SBSW, do RTI
BRCLR
TST
BNE
DEC
DEC
PULH
RTI
1 = Break interrupt during stop/wait mode
0 = No break interrupt during stop/wait mode
—
$FE00
Bit 7
Rev. 6
R
Figure 6-6. SIM Break Status Register (SBSR)
5
6
SBSW,BSR, RETURN
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
Break Module (BRK)
R
6
R
R
5
= Reserved
R
4
;
;
; If RETURNLO is not 0,
; then just decrement low byte.
; Else deal with high byte also.
; Point to WAIT/STOP opcode.
; Restore H register.
See if wait mode or stop mode
was exited by break.
R
3
R
2
Break Module Registers
Break Module (BRK)
SBSW
Note
1
0
Technical Data
Bit 0
R
103