MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 123

• Manufacturer Part Number: MC68HC908GP32CP
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7.5.8 Crystal Output Frequency Signal (CGMXCLK)
7.5.9 CGMC Base Clock Output (CGMOUT)
7.5.10 CGMC CPU Interrupt (CGMINT)
7.6 CGMC Registers
MC68HC908GP32
MOTOROLA
•
MC68HC08GP32
CGMXCLK is the crystal oscillator output signal. It runs at the full speed
of the crystal (f
Figure 7-2
OSC2 and may not represent the actual circuitry. The duty cycle of
CGMXCLK is unknown and may depend on the crystal and other
external factors. Also, the frequency and amplitude of CGMXCLK can be
unstable at startup.
CGMOUT is the clock output of the CGMC. This signal goes to the SIM,
which generates the MCU clocks. CGMOUT is a 50 percent duty cycle
clock running at twice the bus frequency. CGMOUT is software
programmable to be either the oscillator output, CGMXCLK, divided by
two or the VCO clock, CGMVCLK, divided by two.
CGMINT is the interrupt signal generated by the PLL lock detector.
These registers control and monitor operation of the CGMC:
•
•
•
•
PLL control register (PCTL)
(See
PLL bandwidth control register (PBWC)
(See
PLL multiplier select register high (PMSH)
(See
PLL multiplier select register low (PMSL)
(See
—
Rev. 6
Clock Generator Module (CGMC)
shows only the logical relation of CGMXCLK to OSC1 and
7.6.1 PLL Control
7.6.2 PLL Bandwidth Control
7.6.3 PLL Multiplier Select Register
7.6.4 PLL Multiplier Select Register
XCLK
) and comes directly from the crystal oscillator circuit.
Register.)
Register.)
Clock Generator Module (CGMC)
High.)
Low.)
CGMC Registers
Technical Data
121