MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 153

IC MCU 8MHZ 32K FLASH 40-DIP

MC68HC908GP32CP

Manufacturer Part Number
MC68HC908GP32CP
Description
IC MCU 8MHZ 32K FLASH 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908GP32CP
Manufacturer:
ROCKWELL
Quantity:
201
Part Number:
MC68HC908GP32CP
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
10.4.4 Program Counter
MC68HC908GP32
MOTOROLA
NOTE:
MC68HC08GP32
The location of the stack is arbitrary and may be relocated anywhere in
RAM. Moving the SP out of page 0 ($0000 to $00FF) frees direct
address (page 0) space. For correct operation, the stack pointer must
point only to RAM locations.
The program counter is a 16-bit register that contains the address of the
next instruction or operand to be fetched.
Normally, the program counter automatically increments to the next
sequential memory location every time an instruction or operand is
fetched. Jump, branch, and interrupt operations load the program
counter with an address other than that of the next sequential location.
During reset, the program counter is loaded with the reset vector
address located at $FFFE and $FFFF. The vector address is the
address of the first instruction to be executed after exiting the reset state.
Reset:
Reset:
Read:
Read:
Write:
Write:
Bit
Bit
15
15
0
Rev. 6
14
14
Central Processor Unit (CPU)
0
13
13
0
Figure 10-5. Program Counter (PC)
Figure 10-4. Stack Pointer (SP)
12
12
0
11
11
Loaded with Vector from $FFFE and $FFFF
0
10
10
0
9
0
9
8
0
8
7
1
7
6
1
6
Central Processor Unit (CPU)
5
1
5
4
1
4
3
1
3
Technical Data
CPU Registers
2
1
2
1
1
1
151
Bit
Bit
0
1
0

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