MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 95

• Manufacturer Part Number: MC68HC908GP32CP
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

5.8.1 ADC Status and Control Register
MC68HC908GP32
MOTOROLA
•
MC68HC08GP32
Address:
Function of the ADC status and control register (ADSCR) is described
here.
COCO — Conversions Complete
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
Reset:
Read:
Write:
When the AIEN bit is a logic 0, the COCO is a read-only bit which is
set each time a conversion is completed except in the continuous
conversion mode where it is set after the first conversion. This bit is
cleared whenever the ADSCR is written or whenever the ADR is read.
If the AIEN bit is a logic 1, the COCO becomes a read/write bit, which
should be cleared to logic 0 for CPU to service the ADC interrupt
request. Reset clears this bit.
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when the data register is
read or the status/control register is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update the
ADR register at the end of each conversion. Only one conversion is
completed between writes to the ADSCR when this bit is cleared.
Reset clears the ADCO bit.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0)/CPU interrupt (AIEN = 1)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
Figure 5-2. ADC Status and Control Register (ADSCR)
—
COCO
$003C
Bit 7
Rev. 6
Analog-to-Digital Converter (ADC)
0
AIEN
6
0
ADCO
5
0
ADCH4
4
1
ADCH3
3
1
Analog-to-Digital Converter (ADC)
ADCH2
2
1
ADCH1
1
1
Technical Data
I/O Registers
ADCH0
Bit 0
1
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