MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 325

IC MCU 8MHZ 32K FLASH 40-DIP

MC68HC908GP32CP

Manufacturer Part Number
MC68HC908GP32CP
Description
IC MCU 8MHZ 32K FLASH 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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20.11 Low-Power Modes
20.11.1 Wait Mode
20.11.2 Stop Mode
MC68HC908GP32
MOTOROLA
MC68HC08GP32
By not resetting the SPRF, OVRF, and MODF flags, the user can still
service these interrupts after the SPI has been disabled. The user can
disable the SPI by writing 0 to the SPE bit. The SPI can also be disabled
by a mode fault occurring in an SPI that was configured as a master with
the MODFEN bit set.
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
The SPI module remains active after the execution of a WAIT instruction.
In wait mode the SPI module registers are not accessible by the CPU.
Any enabled CPU interrupt request from the SPI module can bring the
MCU out of wait mode.
If SPI module functions are not required during wait mode, reduce power
consumption by disabling the SPI module before executing the WAIT
instruction.
To exit wait mode when an overflow condition occurs, enable the OVRF
bit to generate CPU interrupt requests by setting the error interrupt
enable bit (ERRIE).
The SPI module is inactive after the execution of a STOP instruction.
The STOP instruction does not affect register conditions. SPI operation
resumes after an external interrupt. If stop mode is exited by reset, any
transfer in progress is aborted, and the SPI is reset.
Serial Peripheral Interface Module (SPI)
Rev. 6
(See 20.9
Interrupts.)
Serial Peripheral Interface Module (SPI)
Low-Power Modes
Technical Data
323

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