MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 205

• Manufacturer Part Number: MC68HC908GP32CP
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

15.4.4 Baud Rate
15.4.5 Commands
MC68HC908GP32
MOTOROLA
•
MC68HC08GP32
The communication baud rate is controlled by the crystal frequency and
the state of the PTC3 pin (when IRQ is set to V
monitor mode. When PTC3 is high, the divide by ratio is 1024. If the
PTC3 pin is at logic 0 upon entry into monitor mode, the divide by ratio
is 512.
If monitor mode was entered with V
set at 1024, regardless of PTC3. If monitor mode was entered with V
on IRQ, then the internal PLL steps up the external frequency, presumed
to be 32.768 kHz, to 2.4576 MHz. These latter two conditions for monitor
mode entry require that the reset vector is blank.
Table 15-3
baud rate of 9600 BPS. Other standard baud rates can be accomplished
using proportionally higher or lower frequency generators. If using a
crystal as the clock source, be aware of the upper frequency limit that the
internal clock module can handle. See
23.9 3.0-V Control Timing
The monitor ROM firmware uses these commands:
•
•
•
4.9152 MHz
9.8304 MHz
9.8304 MHz
Frequency
32.768 kHz
External
READ (read memory)
WRITE (write memory)
IREAD (indexed read)
—
Rev. 6
lists external frequencies required to achieve a standard
Table 15-3. Monitor Baud Rate Selection
Monitor ROM (MON)
V
V
IRQ
V
V
TST
TST
DD
SS
for this limit.
PTC3
X
X
0
1
DD
on IRQ, then the divide by ratio is
23.8 5.0-V Control Timing
2.4576 MHz
2.4576 MHz
2.4576 MHz
2.4576 MHz
Frequency
Internal
TST
) upon entry into
Functional Description
Monitor ROM (MON)
Baud Rate
Technical Data
(BPS)
9600
9600
9600
9600
and
203
SS