HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 151

IC H8 MCU FLASH 128K 100QFP

HD64F3048BF25

Manufacturer Part Number
HD64F3048BF25
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048BF25

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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6.1
The H8/3048B Group has an on-chip bus controller that divides the address space into eight areas
and can assign different bus specifications to each. This enables different types of memory to be
connected easily.
A bus arbitration function of the bus controller controls the operation of the DMA controller
(DMAC) and refresh controller. The bus controller can also release the bus to an external device.
6.1.1
Features of the bus controller are listed below.
Independent settings for address areas 7 to 0
Four wait modes
Bus arbitration function
128-kbyte areas in 1-Mbyte modes; 2-Mbyte areas in 16-Mbyte modes.
Chip select signals (CS
Areas can be designated for 8-bit or 16-bit access.
Areas can be designated for two-state or three-state access.
Programmable wait mode, pin auto-wait mode, and pin wait modes 0 and 1 can be selected.
Zero to three wait states can be inserted automatically.
A built-in bus arbiter arbitrates the bus right to the CPU, DMAC, refresh controller, or an
external bus master.
Features
Overview
Section 6 Bus Controller
7
to CS
0
) can be output for areas 7 to 0.
Rev. 3.00 Sep 27, 2006 page 123 of 872
Section 6 Bus Controller
REJ09B0325-0300

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