HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 768
![IC H8 MCU FLASH 128K 100QFP](/photos/12/21/122166/qfp100-g1_pkg_sml.jpg)
HD64F3048BF25
Manufacturer Part Number
HD64F3048BF25
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.DF3048BF25V.pdf
(903 pages)
Specifications of HD64F3048BF25
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3048BF25
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F3048BF25V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
- Current page: 768 of 903
- Download datasheet (5Mb)
Appendix B Internal I/O Register
Address
(low)
H'B0
H'B1
H'B2
H'B3
H'B4
H'B5
H'B6
H'B7
H'B8
H'B9
H'BA
H'BB
H'BC
H'BD
H'BE
H'BF
H'C0
H'C1
H'C2
H'C3
H'C4
H'C5
H'C6
H'C7
H'C8
H'C9
H'CA
H'CB
H'CC
H'CD
H'CE
H'CF
Rev. 3.00 Sep 27, 2006 page 740 of 872
REJ09B0325-0300
Register
Name
SMR
BRR
SCR
TDR
SSR
RDR
SCMR
Reserved area (access prohibited)
SMR
BRR
SCR
TDR
SSR
RDR
Reserved area (access prohibited)
P1DDR
P2DDR
P1DR
P2DR
P3DDR
P4DDR
P3DR
P4DR
P5DDR
P6DDR
P5DR
P6DR
—
P8DDR
P7DR
P8DR
Data
Bus
Width Bit 7
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
C/A
TIE
TDRE
—
C/A
TIE
TDRE
P1
P2
P1
P2
P3
P4
P3
P4
—
—
—
—
—
—
P7
—
7
7
7
7
7
7
7
7
7
DDR P1
DDR P2
DDR P3
DDR P4
/
GM CHR
Bit 6
RIE
RDRF
—
CHR
RIE
RDRF
P1
P2
P3
P4
—
P6
—
P6
—
—
P7
—
6
6
6
6
6
6
6
6
6
6
6
DDR P1
DDR P2
DDR P3
DDR P4
DDR P6
Bit 5
PE
TE
ORER
—
PE
TE
ORER
P1
P2
P3
P4
—
—
P6
—
—
P7
—
5
5
5
5
5
5
5
5
5
5
5
DDR P1
DDR P2
DDR P3
DDR P4
DDR P6
Bit 4
O/E
RE
FER/
ERS
—
O/E
RE
FER
P1
P2
P3
P4
—
—
P6
—
P8
P7
P8
4
4
4
4
4
4
4
4
4
4
4
4
4
DDR P1
DDR P2
DDR P3
DDR P4
DDR P6
DDR P8
Bit Names
Bit 3
STOP
MPIE
PER
SDIR
STOP
MPIE
PER
P1
P2
P3
P4
P5
P5
P6
—
P7
P8
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
DDR P1
DDR P2
DDR P3
DDR P4
DDR P5
DDR P6
DDR P8
Bit 2
MP
TEIE
TEND
SINV
MP
TEIE
TEND
P1
P2
P3
P4
P5
P6
—
P7
P8
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
DDR P1
DDR P2
DDR P3
DDR P4
DDR P5
DDR P6
DDR P8
Bit 1
CKS1
CKE1
MPB
—
CKS1
CKE1
MPB
P1
P2
P3
P4
P5
P6
—
P7
P8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DDR P1
DDR P2
DDR P3
DDR P4
DDR P5
DDR P6
DDR P8
Bit 0
CKS0
CKE0
MPBT
SMIF
CKS0
CKE0
MPBT
P1
P2
P3
P4
P5
P6
—
P7
P8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DDR Port 1
DDR Port 2
DDR Port 3
DDR Port 4
DDR Port 5
DDR Port 6
DDR Port 8
Module
Name
SCI channel 0
SCI channel 1
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
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