HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 553

• Manufacturer Part Number: HD64F3048BF25
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048BF25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The operating sequence is as follows.
1. When not in use, the data line is in the high-impedance state, and is pulled up to the high level
2. To start transmitting a frame of data, the transmitting device transmits a low start bit (Ds),
3. Next, in the smart card interface, the transmitting device returns the data line to the high-
4. The receiving device performs a parity check. If there is no parity error, the receiving device
5. If the transmitting device does not receive an error signal, it proceeds to transmit the next data.
No parity error
Parity error
Legend:
Ds:
D0 to D7:
Dp:
DE:
through a resistor.
followed by eight data bits (D0 to D7) and a parity bit (Dp).
impedance state. The data line is pulled up to the high level through a resistor.
waits to receive the next data. If a parity error is present, the receiving device outputs a low
error signal (DE) to request retransmission of the data. After outputting the error signal for a
designated interval, the receiving device returns the signal line to the high-impedance state.
The signal line is pulled back up to the high level through the pull-up resistor.
If it receives an error signal, it returns to step 2 and transmits the same data again.
Ds
Ds
Start bit
Data bits
Parity bit
Error signal
D0
D0
D1
D1
Figure 14.3 Smart Card Interface Data Format
Output from transmitting device
Output from transmitting device
D2
D2
D3
D3
D4
D4
D5
D5
Rev. 3.00 Sep 27, 2006 page 525 of 872
D6
D6
Section 14 Smart Card Interface
D7
D7
Dp
Dp
REJ09B0325-0300
Output from
receiving device
DE