MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 211

IC MPU 32BIT 66MHZ 196-MAPBGA

MCF5272CVF66

Manufacturer Part Number
MCF5272CVF66
Description
IC MPU 32BIT 66MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5272CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Not Compliant

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Figure 9-14
(T1), the SDRAM writes all of its on-chip RAM page buffers back into the SDRAM array. The SDTR[RP]
value determines the number of dead cycles after a precharge. Note that auto refresh occurs in T3.
SDTR[RC] determines the number of clock cycles the SDRAM remains in refresh state, during which time
it cannot accept other commands.
Freescale Semiconductor
SDCR[SLEEP]
A10_PRECHG
Internal Clock
SDADR[13:0]
SDBA[1:0]
SDCLKE
SDCLK
SDWE
SDCS
RAS0
CAS0
shows the timing for entering SDRAM self-refresh mode. During a
T0
MCF5272 ColdFire
Precharge
All Banks NOP
T1
Figure 9-14. Enter SDRAM Self-Refresh Mode
T2
Refresh
®
T3
Self
Integrated Microprocessor User’s Manual, Rev. 3
T4
T5
T6
T7
T8
T9
PRECHARGE ALL
T10
T11
SDRAM Controller
T12
command
T13
9-21

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