MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 88

• Manufacturer Part Number: MCF5272CVF66
• Description: IC MPU 32BIT 66MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Not Compliant

ColdFire Core
2.7.1
The execution times for the MOVE.{B,W,L} instructions are shown in the next tables.
the timing for the other generic move operations.
Table 2-10
2-20
(d8,PC,Xi*SF)
(d8,Ay,Xi*SF)
(d16,PC)
(d16,Ay)
Source
(xxx).w
#<xxx>
(xxx).l
(Ay)+
–(Ay)
(Ay)
Dy
Ay
lists execution times for MOVE.{B,W} instructions.
MOVE Instruction Execution Times
For all tables in this section, the execution time of any instruction using the
PC-relative effective addressing modes is equivalent to the time using
comparable An-relative mode.
The nomenclature “(xxx).wl” refers to both forms of absolute addressing,
(xxx).w and (xxx).l.
ET with {<ea> = (d16,PC)}
ET with {<ea> = (d8,PC,Xi*SF)} equals ET with {<ea> = (d8,An,Xi*SF)}
1(0/0)
1(0/0)
3(1/0)
3(1/0)
3(1/0)
3(1/0)
4(1/0)
3(1/0)
3(1/0)
3(1/0)
4(1/0)
1(0/0)
Rx
MCF5272 ColdFire
Table 2-10. Move Byte and Word Execution Times
1(0/1)
1(0/1)
3(1/1)
3(1/1)
3(1/1)
4(1/1)
3(1/1)
3(1/1)
3(1/1)
4(1/1)
3(0/1)
31/1)
(Ax)
®
Integrated Microprocessor User’s Manual, Rev. 3
1(0/1)
1(0/1)
3(1/1)
3(1/1)
3(1/1)
3(1/1)
4(1/1)
3(1/1)
3(1/1)
3(1/1)
4(1/1)
3(0/1)
(Ax)+
NOTE
equals ET with {<ea> = (d16,An)}
1(0/1)
1(0/1)
3(1/1)
3(1/1)
3(1/1)
3(1/1)
4(1/1)
3(1/1)
3(1/1)
3(1/1)
4(1/1)
3(0/1)
Destination
–(Ax)
(d16,Ax)
1(0/1)
1(0/1)
3(1/1)
3(1/1)
3(1/1)
3(1/1)
3(1/1)
—
—
—
—
—
(d8,Ax,Xi*SF)
2(0/1)
2(0/1)
4(1/1)
4(1/1)
4(1/1)
—
—
—
—
—
—
—
Freescale Semiconductor
Table 2-12
(xxx).wl
1(0/1)
1(0/1)
3(1/1)
3(1/1)
3(1/1)
—
—
—
—
—
—
—
shows