MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 525

• Manufacturer Part Number: MCF5272CVF66
• Description: IC MPU 32BIT 66MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Not Compliant

Freescale Semiconductor
0x0394
0x0398
0x039C
0x0C40–
0x08CC
0x08EC
0x0C0C
0x0DFF
0x038C
0x084C
0x08D0
0x0C00
0x0C04
0x0C08
0x0C10
0x0C14
0x0C18
0x0392
0x0840
0x0844
0x0848
0x0850
0x0854
0x0880
0x0884
0x08E4
0x0944
0x0948
0x0984
MBAR
Offset
MBAR
Offset
Aperiodic Interrupt Status Register (PASR)
[31:24]
[31:24]
MCF5272 ColdFire
Port0 Sync Delay (P0SDR)
Port2 Sync Delay (P2SDR)
Table A-14. PLIC Module Memory Map (continued)
Reserved
Reserved
Table A-15. Ethernet Module Memory Map
®
Ethernet Receive Bound Register (FRBR)
Integrated Microprocessor User’s Manual, Rev. 3
Maximum Frame Length Register (MFLR)
Ethernet Interrupt Mask Register (EIMR)
Ethernet Rx FIFO Start Address (FRSR)
Ethernet Tx FIFO Start Address (TFSR)
Ethernet Rx Ring Updated Flag (RDAR)
Ethernet Tx Ring Updated Flag (TDAR)
Ethernet Interrupt Vector Status (IVSR)
Ethernet Interrupt Event Register (EIR)
Ethernet Rx Descriptor Ring (ERDSR)
Ethernet MII Speed Register (MSCR)
Ethernet Hash Table (Upper) (HTUR)
Ethernet Hash Table (Lower) (HTLR)
Ethernet Tx Descriptor Rin (ETDSR)
[23:16]
[23:16]
Ethernet Rx Control Register (RCR)
Ethernet MII Data Register (MMFR)
Ethernet Tx Control Register (TCR)
Transmit FIFO Watermark (TFWR)
Ethernet Address (Upper) (MAUR)
Ethernet Address (Lower) (MALR)
Ethernet Rx Buffer Size (EMRBR)
Ethernet Control Register (ECR)
FIFO RAM (EFIFO)
Reserved
[15:8]
[15:8]
D Channel Request (PDRQR)
Port1 Sync Delay (P1SDR)
Port3 Sync Delay (P3SDR)
Clock Select (PCSR)
Loop back Control (PLCR)
List of Memory Maps
[7:0]
[7:0]
A-9