XR88C681J-F Exar Corporation, XR88C681J-F Datasheet - Page 39

• Manufacturer Part Number: XR88C681J-F
• Description: IC UART CMOS DUAL 44PLCC
• Manufacturer: Exar Corporation
• Type: CMOS Dual Channel UARTr

Specifications of XR88C681J-F

• Number Of Channels: 2, DUART
• Package / Case: 44-LCC (J-Lead)
• Features: *
• Fifo's: 1 Byte, 3 Byte
• Voltage - Supply: 5V
• With Parallel Port: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 1 Mbps
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Supply Current: 15 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 5 V
• Propagation Delay Time Ns: 400 ns
• No. Of Channels: 2
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: PLCC
• No. Of Pins: 44
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1329

C.6.1.5 Z-80 CPU
The Z-80 CPU can be interfaced to a DUART operating in
the I-Mode, if it (the CPU) is operating in Interrupt Modes 0
or 1. However, for the sake of “process or continuity”, the
details associated with the Z-80 CPU will be presented in
Section C.6.2.1.
C.6.2 Z-Mode Interrupt Servicing
The DUART will be in the I-Mode following power up or a
hardware reset of the IC. The user must invoke the “Set
Z-Mode” command (see Table 3), in order to command
the DUART into the Z-Mode.
interfacing to a DUART operating in the Z-Mode will
function as follows during interrupt servicing.
If the DUART requests interrupt servicing from the CPU, it
will assert the -INTR pin (e.g., toggle “low”). Once the
CPU has detected the interrupt request, it will issue an
IACK (Interrupt Acknowledge) signal back to the DUART.
When the CPU sends the IACK signal to the DUART it is
informing the DUART that its interrupt request is about to
Rev. 2.11
Figure 14. Glue Logic Circuitry Required to Interface the MC68HC11 C to the XR88C681 DUART
-R/W
E clock
-RESET
In general, a CPU
39
be served. When the DUART has received (or detected)
the IACK signal, it will, in response, place the contents of
the Interrupt Vector Register (IVR) on the Data Bus. The
CPU will read this “interrupt vector” information; and
determine the following two things (based on the
“interrupt vector” information).
D The source of the interrupt request (e.g., which pe-
D The appropriate location of the interrupt service rou-
Afterwards, program-control will be branched to the
location of the interrupt service routine.
Another characteristic of Z-Mode operation is that it
allows the user to prioritize the interrupt requests from
numerous peripheral devices, via hardware means. Let
us suppose that we have several DUART devices; and
that each of these devices have been configured to
operate in the Z-Mode. The user could prioritize the
interrupt request of each of these devices by connecting
these devices in a “daisy-chain” in a manner as presented
in Figure 15.
ripheral needs service).
tine.
XR88C681
RESET
-WR
-RD